From mboxrd@z Thu Jan  1 00:00:00 1970
From: Nadav Amit <nadav.amit@gmail.com>
Subject: Re: [PATCH 1/5] KVM: x86: avoid atomic operations on APICv vmentry
Date: Fri, 14 Oct 2016 12:44:53 -0700
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To: Paolo Bonzini <pbonzini@redhat.com>
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> On Oct 14, 2016, at 11:56 AM, Paolo Bonzini <pbonzini@redhat.com> =
wrote:
>>>=20
>>> 	for (i =3D 0; i <=3D 7; i++) {
>>> -		pir_val =3D xchg(&pir[i], 0);
>>> -		if (pir_val)
>>> +		pir_val =3D READ_ONCE(pir[i]);
>>=20
>> Out of curiosity, do you really need this READ_ONCE?
>=20
> The answer can only be "depends on the compiler's whims". :)
> If you think of READ_ONCE as a C11 relaxed atomic load, then yes.

Hm.. So the idea is to make the code "race-free=E2=80=9D in the sense
that every concurrent memory access is done using READ_ONCE/WRITE_ONCE?

If that is the case, I think there are many other cases that need to be
changed, for example apic->irr_pending and vcpu->arch.pv.pv_unhalted.