RE: wifi: rtw88: question about SDIO RX aggregation limiting

[Ping-Ke Shih <pkshih@realtek.com>]

> -----Original Message-----
> From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> Sent: Monday, June 12, 2023 4:23 AM
> To: linux-wireless@vger.kernel.org; Ping-Ke Shih <pkshih@realtek.com>
> Cc: Lukas F. Hartmann <lukas@mntre.com>; linux-kernel@vger.kernel.org; tony0620emma@gmail.com;
> jernej.skrabec@gmail.com
> Subject: wifi: rtw88: question about SDIO RX aggregation limiting
> 
> Hello Ping-Ke,
> 
> certain Amlogic SDIO host controllers have a limit of
> receiving/transmitting at most 1536 bytes at a time.
> It turns out that rtw_sdio_enable_rx_aggregation() from rtw88/sdio.c
> is not taking this into account currently.
> For any RX buffer that is bigger than 1536 bytes (which can happen due
> to RX aggregation) we're unable to do any processing on the host side
> because all bytes beyond the 1536 bytes mark are lost.
> 
> Lukas found that limiting BIT_RXDMA_AGG_PG_TH to 0x6 makes his
> RTL8822CS work on the affected Amlogic SoCs.
> 
> My question now is: how can we properly limit BIT_RXDMA_AGG_PG_TH
> without hard-coding a one-fits-all value (which may reduce
> performance)?
> 
> Initially I thought that we could just calculate it:
>   host_max_pages = mmc_host->max_req_size / rtwdev->chip->page_size
> max_req_size for the affected controller is 1536 and chip->page_size
> is 128, so the result would be 12 (I thought it would be close to this
> number, maybe +/-1).
> Unfortunately this doesn't fix the issue and for his board
> BIT_RXDMA_AGG_PG_TH the limit is 6 or 7.
> 
> If you could describe how BIT_RXDMA_AGG_PG_TH generally works I can
> come up with the algorithm to calculate the limit on my own (at least
> I hope so).
> Lukas has been very patient with testing so far and I understood that
> he's willing to test further patches if we think that it fixes the
> rtw88 driver issue he's seeing.
> 

The unit of BIT_RXDMA_AGG_PG_TH is 1k bytes, so I think you can
set mmc_host->max_req_size/1024.

I wonder why 0x6 works on Amlogic SoCs. Could you or Lukas compare performance
between the settings of 0x1 and 0x6?

Ping-Ke