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[200.204.190.237]) by smtp.gmail.com with ESMTPSA id af79cd13be357-93f56e0b402sm117145485a.33.2026.10.20.17.39.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 Oct 2026 17:39:23 -0700 (PDT) Message-ID: <9c468ae3-e303-40da-bbc8-a22a82b9bc97@oss.qualcomm.com> Date: Tue, 20 Oct 2026 21:39:19 -0300 X-Archived-By: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/4] RISC-V: ACPI: Add PPTT support To: Drew Fustini , Sunil V L Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, Palmer Dabbelt , Alistair Francis , Weiwei Li , Liu Zhiwei , Chao Liu , "Michael S . Tsirkin" , Igor Mammedov , Ani Sinha , Anup Patel , Prajwal N , Shankar C , Jinjie Ruan <2118537295@qq.com>, ruanjinjie@huawei.com References: <20261015064957.4076464-1-sunilvl@oss.qualcomm.com> From: Daniel Henrique Barboza Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIxMDAwMSBTYWx0ZWRfX3otdxChel4oU NUsVdEicvGJNwSSqhXA4KdAXnjCCqMt1xtRxBQ5sV6Zc2UngFePUZL2s861x1vZyJgry8Ke87Pb Ss+AGMmFbH3H7HuAL0UCL5XTFYxxuA4= X-Proofpoint-GUID: 4CTS32UsTeuxzNDDUKwZwzCCWIjeUU2D X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIxMDAwMSBTYWx0ZWRfXxqYIAHjr4wIT dvcFa26TJLsJ8CmFFKCKlTaPeZit7OteTbf0UTmSYs7VE5k/DKkniYgClBcOnL3xkA7WXZT5O19 Rs4ER/SjV00PYQBJ5RL+AfeftgTOBWc8gN7UCxef3yYo3XQ7jjl0NinQvjNy5AAk5ioWtAszjOJ nKfYnQarxWM1B7whFNfgtrPsL/B2yZkc+EajJlYzJKWW2ZiNlZMymMuBTAFcBiJtY/O2p2ywDha ZFhx99G0K+99IeMaeTRudFkBamngfgjrDDggaW7qJFgPDEMQOcRWX7ctJ/MvxtglW7IisNE8I4t j5SqPXzJPcq7bLZapoPHBwrLrj/cUQ6jDQA37afZDNmYkIUywu7dA+gXVcwQJCXcv0vz9iHRd1M JoZ3WaZ5AeVBot5ktdS/5wtjHkvG4Ri2Nj5vHw++jImVi/9UZsnUR+geT0W4GvKo3ZOzCViXGCi +p7nR2krv9b+Cg9wAaw== X-Authority-Analysis: v=2.4 cv=R42WitRX c=1 sm=1 tr=0 ts=6ad809bc cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=QmVDPCq3bE4LYXGvZ20s0w==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=VwQbUJbxAAAA:8 a=dZbOZ2KzAAAA:8 a=8ZrYuC2gKm7xYYnm9eMA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-ORIG-GUID: 4CTS32UsTeuxzNDDUKwZwzCCWIjeUU2D X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-20_04,2026-10-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 spamscore=0 malwarescore=0 adultscore=0 clxscore=1015 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610210001 Received-SPF: pass client-ip=205.220.180.131; envelope-from=daniel.barboza@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org X-Spam-Status: No, score=-7.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_PASS,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Hi Drew! On 10/20/2026 7:29 PM, Drew Fustini wrote: > On Thu, Oct 15, 2026 at 12:19:53PM +0530, Sunil V L wrote: >> Hi all, >> >> This series adds ACPI Processor Properties Topology Table (PPTT) support to >> the RISC-V virt machine. PPTT allows the guest to discover the processor and >> cache topology exposed by the machine, which is useful for making better >> scheduling and cache-management decisions. > > Thanks for picking up PPTT support. I can now rebase the RQSC support > [1] on this series. > > However, RQSC actually needs PPTT revision 3, because it adds cache IDs > to the PPTT. The RQSC table references a capacity controller's cache by > the PPTT cache ID. In Linux, find_acpi_cache_level_from_id() and > acpi_pptt_get_cpumask_from_cache_id() return -ENOENT if PPTT rev < 3. > > There is a new MPAM series by Jinjie Ruan which contains the patch > "[PATCH 04/37] hw/acpi: Build PPTT rev 3 with cache IDs for MPAM > cross-references" [2]. It bumps build_pptt() to revision 3 and gives > every cache node an ID. > > I could just base the RQSC series on this PPTT series and that patch > 03/37. But maybe there is a better way to coordinate adding PPTT v3? This PPTT support is acked and I believe we'll queue it in riscv-to-apply.next shortly. As for the PPTT rev3 patch in the "Add Arm MPAM emulation", my suggestion is to put that on top of your series (i.e. your series will contain that patch). That ARM series has 37 patches and might take awhile to go through, and your work relies only on patch 04 ... which happens to be an arch agnostic patch. I believe it's fine for us to push it via the riscv queue. I see that the author from the ARM series is CCed here. Jinjie Ruan, are you okay with us pushing your patch via the RISC-V tree? It'll unblock Drew's work and you'll have one less patch to worry about in your ARM MPAM work. Thanks, Daniel > > Thanks, > Drew > > [1] https://lore.kernel.org/all/20260202-riscv-rqsc-v1-0-dcf448a3ed73@kernel.org/ > [2] https://lore.kernel.org/all/tencent_F9C68A515AC6C40BE2C32DB314E14CCB7106@qq.com/