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From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: "Nicola Vetrini" <nicola.vetrini@bugseng.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Teddy Astie" <teddy.astie@vates.tech>,
	"Roger Pau Monné" <roger@xenproject.org>,
	"Tim Deegan" <tim@xen.org>
Subject: [PATCH 03/12] x86/shadow: eliminate unused forms of sh_map_and_validate_gl<N>e()
Date: Fri, 28 Aug 2026 09:00:57 +0200	[thread overview]
Message-ID: <9c4e5674-e79e-4623-b87c-ada690778ffa@suse.com> (raw)
In-Reply-To: <90d0e3d6-2e12-43f1-815d-7936ca4c5fc6@suse.com>

The L2H, L3, and L4 forms only have GUEST_PAGING_LEVELS=4 call sites, i.e.
their 2- and 3-level forms are unreachable, violating Misra rule 2.1. The
L2H form additionally is unused (call site DCE-d) with PV32=n.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/mm/shadow/multi.c
+++ b/xen/arch/x86/mm/shadow/multi.c
@@ -1789,35 +1789,30 @@ sh_map_and_validate(struct vcpu *v, mfn_
     return result;
 }
 
+#if GUEST_PAGING_LEVELS >= 4
 
 int
 sh_map_and_validate_gl4e(struct vcpu *v, mfn_t gl4mfn,
                           void *new_gl4p, u32 size)
 {
-#if GUEST_PAGING_LEVELS >= 4
     return sh_map_and_validate(v, gl4mfn, new_gl4p, size,
                                 SH_type_l4_shadow,
                                 shadow_l4_index,
                                 validate_gl4e);
-#else // ! GUEST_PAGING_LEVELS >= 4
-    BUG(); /* Called in wrong paging mode! */
-#endif
 }
 
 int
 sh_map_and_validate_gl3e(struct vcpu *v, mfn_t gl3mfn,
                           void *new_gl3p, u32 size)
 {
-#if GUEST_PAGING_LEVELS >= 4
     return sh_map_and_validate(v, gl3mfn, new_gl3p, size,
                                 SH_type_l3_shadow,
                                 shadow_l3_index,
                                 validate_gl3e);
-#else // ! GUEST_PAGING_LEVELS >= 4
-    BUG(); /* Called in wrong paging mode! */
-#endif
 }
 
+#endif /* GUEST_PAGING_LEVELS >= 4 */
+
 int
 sh_map_and_validate_gl2e(struct vcpu *v, mfn_t gl2mfn,
                           void *new_gl2p, u32 size)
@@ -1828,19 +1823,17 @@ sh_map_and_validate_gl2e(struct vcpu *v,
                                 validate_gl2e);
 }
 
+#if defined(CONFIG_PV32) && GUEST_PAGING_LEVELS >= 4
 int
 sh_map_and_validate_gl2he(struct vcpu *v, mfn_t gl2mfn,
                            void *new_gl2p, u32 size)
 {
-#if GUEST_PAGING_LEVELS >= 4 && defined(CONFIG_PV32)
     return sh_map_and_validate(v, gl2mfn, new_gl2p, size,
                                 SH_type_l2h_shadow,
                                 shadow_l2_index,
                                 validate_gl2e);
-#else /* Non-PAE guests don't have different kinds of l2 table */
-    BUG(); /* Called in wrong paging mode! */
-#endif
 }
+#endif /* CONFIG_PV32 && GUEST_PAGING_LEVELS >= 4 */
 
 int
 sh_map_and_validate_gl1e(struct vcpu *v, mfn_t gl1mfn,



  parent reply	other threads:[~2026-08-28  7:01 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-28  6:58 [PATCH 00/12] address most remaining Misra rule 2.1 violations Jan Beulich
2026-08-28  6:59 ` [PATCH 01/12] x86/IO-APIC: address Misra 2.1 rule violations Jan Beulich
2026-08-28  8:31   ` Nicola Vetrini
2026-08-28  7:00 ` [PATCH 02/12] x86/mm: pagetable_dying() is HVM+SHADOW_PAGING only Jan Beulich
2026-08-28  7:00 ` Jan Beulich [this message]
2026-08-28  7:01 ` [PATCH 04/12] x86: add noreturn in a few more places Jan Beulich
2026-08-28  7:02 ` [PATCH 05/12] x86/crash: address Misra 2.1 rule violation Jan Beulich
2026-08-28  7:02 ` [PATCH 06/12] kexec: machine_reboot_kexec() doesn't return Jan Beulich
2026-08-28  9:55   ` Nicola Vetrini
2026-08-28  7:03 ` [PATCH 07/12] altp2m: address Misra 2.1 rule violation Jan Beulich
2026-08-28  7:04 ` [PATCH 08/12] Arm/GIC: add noreturn in a few more places Jan Beulich
2026-08-28  7:04 ` [PATCH 09/12] Eclair: deviate BUILD_ERROR() wrt rule 2.1 and introduce variants Jan Beulich
2026-08-28  7:05 ` [PATCH 10/12] PCI/physdev: address Misra 2.1 rule violation Jan Beulich
2026-08-28  7:05 ` [PATCH 11/12] x86/HVM: address Misra 2.1 rule violations Jan Beulich
2026-08-28  7:06 ` [PATCH 12/12] x86/nSVM: address Misra 2.1 rule violation Jan Beulich

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