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Received: from DM5PR12MB1705.namprd12.prod.outlook.com (10.175.88.22) by DM5PR12MB1851.namprd12.prod.outlook.com (10.175.86.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2729.25; Tue, 18 Feb 2020 12:44:40 +0000 Received: from DM5PR12MB1705.namprd12.prod.outlook.com ([fe80::d40e:7339:8605:bc92]) by DM5PR12MB1705.namprd12.prod.outlook.com ([fe80::d40e:7339:8605:bc92%11]) with mapi id 15.20.2729.032; Tue, 18 Feb 2020 12:44:40 +0000 Subject: Re: [PATCH 8/8] drm/ttm: do not keep GPU dependent addresses To: Thomas Zimmermann , Nirmoy Das , dri-devel@lists.freedesktop.org References: <20200217150427.49994-1-nirmoy.das@amd.com> <20200217150427.49994-9-nirmoy.das@amd.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: <9db59846-90b4-2b9a-8200-69297112693a@amd.com> Date: Tue, 18 Feb 2020 13:44:15 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 In-Reply-To: Content-Language: en-US X-ClientProxiedBy: ZR0P278CA0051.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:1d::20) To DM5PR12MB1705.namprd12.prod.outlook.com (2603:10b6:3:10c::22) MIME-Version: 1.0 Received: from [IPv6:2a02:908:1252:fb60:be8a:bd56:1f94:86e7] (2a02:908:1252:fb60:be8a:bd56:1f94:86e7) by ZR0P278CA0051.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:1d::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2729.23 via Frontend Transport; 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charset="us-ascii"; Format="flowed" Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Am 18.02.20 um 13:40 schrieb Thomas Zimmermann: > Hi > > Am 17.02.20 um 16:04 schrieb Nirmoy Das: >> GPU address handling is device specific and should be handle by its device >> driver. >> >> Signed-off-by: Nirmoy Das >> --- >> drivers/gpu/drm/ttm/ttm_bo.c | 7 ------- >> include/drm/ttm/ttm_bo_api.h | 2 -- >> include/drm/ttm/ttm_bo_driver.h | 1 - >> 3 files changed, 10 deletions(-) >> >> diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c >> index 151edfd8de77..d5885cd609a3 100644 >> --- a/drivers/gpu/drm/ttm/ttm_bo.c >> +++ b/drivers/gpu/drm/ttm/ttm_bo.c >> @@ -85,7 +85,6 @@ static void ttm_mem_type_debug(struct ttm_bo_device *bdev, struct drm_printer *p >> drm_printf(p, " has_type: %d\n", man->has_type); >> drm_printf(p, " use_type: %d\n", man->use_type); >> drm_printf(p, " flags: 0x%08X\n", man->flags); >> - drm_printf(p, " gpu_offset: 0x%08llX\n", man->gpu_offset); >> drm_printf(p, " size: %llu\n", man->size); >> drm_printf(p, " available_caching: 0x%08X\n", man->available_caching); >> drm_printf(p, " default_caching: 0x%08X\n", man->default_caching); >> @@ -345,12 +344,6 @@ static int ttm_bo_handle_move_mem(struct ttm_buffer_object *bo, >> moved: >> bo->evicted = false; >> >> - if (bo->mem.mm_node) >> - bo->offset = (bo->mem.start << PAGE_SHIFT) + >> - bdev->man[bo->mem.mem_type].gpu_offset; >> - else >> - bo->offset = 0; >> - > After moving this into users, the else branch has been lost. Is > 'bo->mem.mm_node' always true? At least for the amdgpu and radeon use cases, yes. But that is a rather good question I mean for it is illegal to get the GPU BO address if it is inaccessible (e.g. in the system domain). Could be that some driver relied on the behavior to get 0 for the system domain here. Regards, Christian. > > Best regards > Thomas > >> ctx->bytes_moved += bo->num_pages << PAGE_SHIFT; >> return 0; >> >> diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h >> index b9bc1b00142e..d6f39ee5bf5d 100644 >> --- a/include/drm/ttm/ttm_bo_api.h >> +++ b/include/drm/ttm/ttm_bo_api.h >> @@ -213,8 +213,6 @@ struct ttm_buffer_object { >> * either of these locks held. >> */ >> >> - uint64_t offset; /* GPU address space is independent of CPU word size */ >> - >> struct sg_table *sg; >> }; >> >> diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h >> index c9e0fd09f4b2..c8ce6c181abe 100644 >> --- a/include/drm/ttm/ttm_bo_driver.h >> +++ b/include/drm/ttm/ttm_bo_driver.h >> @@ -177,7 +177,6 @@ struct ttm_mem_type_manager { >> bool has_type; >> bool use_type; >> uint32_t flags; >> - uint64_t gpu_offset; /* GPU address space is independent of CPU word size */ >> uint64_t size; >> uint32_t available_caching; >> uint32_t default_caching; >> _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0621AC3403A for ; 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Tue, 18 Feb 2020 12:44:40 +0000 Subject: Re: [PATCH 8/8] drm/ttm: do not keep GPU dependent addresses To: Thomas Zimmermann , Nirmoy Das , dri-devel@lists.freedesktop.org References: <20200217150427.49994-1-nirmoy.das@amd.com> <20200217150427.49994-9-nirmoy.das@amd.com> From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: <9db59846-90b4-2b9a-8200-69297112693a@amd.com> Date: Tue, 18 Feb 2020 13:44:15 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 In-Reply-To: Content-Language: en-US X-ClientProxiedBy: ZR0P278CA0051.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:1d::20) To DM5PR12MB1705.namprd12.prod.outlook.com (2603:10b6:3:10c::22) MIME-Version: 1.0 Received: from [IPv6:2a02:908:1252:fb60:be8a:bd56:1f94:86e7] (2a02:908:1252:fb60:be8a:bd56:1f94:86e7) by ZR0P278CA0051.CHEP278.PROD.OUTLOOK.COM (2603:10a6:910:1d::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2729.23 via Frontend Transport; Tue, 18 Feb 2020 12:44:37 +0000 X-Originating-IP: [2a02:908:1252:fb60:be8a:bd56:1f94:86e7] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: b3bcf854-f61e-4741-2d23-08d7b47051fe X-MS-TrafficTypeDiagnostic: DM5PR12MB1851:|DM5PR12MB1851: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7691; 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charset="us-ascii"; Format="flowed" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Am 18.02.20 um 13:40 schrieb Thomas Zimmermann: > Hi > > Am 17.02.20 um 16:04 schrieb Nirmoy Das: >> GPU address handling is device specific and should be handle by its device >> driver. >> >> Signed-off-by: Nirmoy Das >> --- >> drivers/gpu/drm/ttm/ttm_bo.c | 7 ------- >> include/drm/ttm/ttm_bo_api.h | 2 -- >> include/drm/ttm/ttm_bo_driver.h | 1 - >> 3 files changed, 10 deletions(-) >> >> diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c >> index 151edfd8de77..d5885cd609a3 100644 >> --- a/drivers/gpu/drm/ttm/ttm_bo.c >> +++ b/drivers/gpu/drm/ttm/ttm_bo.c >> @@ -85,7 +85,6 @@ static void ttm_mem_type_debug(struct ttm_bo_device *bdev, struct drm_printer *p >> drm_printf(p, " has_type: %d\n", man->has_type); >> drm_printf(p, " use_type: %d\n", man->use_type); >> drm_printf(p, " flags: 0x%08X\n", man->flags); >> - drm_printf(p, " gpu_offset: 0x%08llX\n", man->gpu_offset); >> drm_printf(p, " size: %llu\n", man->size); >> drm_printf(p, " available_caching: 0x%08X\n", man->available_caching); >> drm_printf(p, " default_caching: 0x%08X\n", man->default_caching); >> @@ -345,12 +344,6 @@ static int ttm_bo_handle_move_mem(struct ttm_buffer_object *bo, >> moved: >> bo->evicted = false; >> >> - if (bo->mem.mm_node) >> - bo->offset = (bo->mem.start << PAGE_SHIFT) + >> - bdev->man[bo->mem.mem_type].gpu_offset; >> - else >> - bo->offset = 0; >> - > After moving this into users, the else branch has been lost. Is > 'bo->mem.mm_node' always true? At least for the amdgpu and radeon use cases, yes. But that is a rather good question I mean for it is illegal to get the GPU BO address if it is inaccessible (e.g. in the system domain). Could be that some driver relied on the behavior to get 0 for the system domain here. Regards, Christian. > > Best regards > Thomas > >> ctx->bytes_moved += bo->num_pages << PAGE_SHIFT; >> return 0; >> >> diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h >> index b9bc1b00142e..d6f39ee5bf5d 100644 >> --- a/include/drm/ttm/ttm_bo_api.h >> +++ b/include/drm/ttm/ttm_bo_api.h >> @@ -213,8 +213,6 @@ struct ttm_buffer_object { >> * either of these locks held. >> */ >> >> - uint64_t offset; /* GPU address space is independent of CPU word size */ >> - >> struct sg_table *sg; >> }; >> >> diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h >> index c9e0fd09f4b2..c8ce6c181abe 100644 >> --- a/include/drm/ttm/ttm_bo_driver.h >> +++ b/include/drm/ttm/ttm_bo_driver.h >> @@ -177,7 +177,6 @@ struct ttm_mem_type_manager { >> bool has_type; >> bool use_type; >> uint32_t flags; >> - uint64_t gpu_offset; /* GPU address space is independent of CPU word size */ >> uint64_t size; >> uint32_t available_caching; >> uint32_t default_caching; >> _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel