From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jon Smirl Subject: Re: Interrupt forwarding Date: Sun, 13 Mar 2005 11:49:23 -0500 Message-ID: <9e473391050313084920740f5c@mail.gmail.com> References: <9e47339105031212076030c603@mail.gmail.com> <9e473391050313075613352bba@mail.gmail.com> <5d91cd530ace01c1b50c26454b435ab1@cl.cam.ac.uk> Reply-To: Jon Smirl Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit In-Reply-To: <5d91cd530ace01c1b50c26454b435ab1@cl.cam.ac.uk> Sender: xen-devel-admin@lists.sourceforge.net Errors-To: xen-devel-admin@lists.sourceforge.net List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , List-Archive: To: Keir Fraser Cc: xen-devel@lists.sourceforge.net, Ian Pratt , ian.pratt@cl.cam.ac.uk List-Id: xen-devel@lists.xenproject.org On Sun, 13 Mar 2005 16:01:19 +0000, Keir Fraser wrote: > But Xen does support shared IRQs. They're not as good as a separate IRQ > per device from an isolation pov, but would you really expect > otherwise? Does Xen require the IRQ handler to run in the supervisor or domain? If it is in the domain and the domain dies, what do you do about the interrupt that keeps interrupting because there is no more code to acknowledge it? If you shut it off at the PIC you shut off all devices on that interrupt. A proposal was recently made on lkml that request_irq would also pass in a structure that would enable the kernel to acknowledge the IRQ without the handler being there. Xen could pass info like that from the domain back to the supervisor. Then in the domain dies the supervisor has the info needed to shut off the specific interrupt. On Fri, 11 Mar 2005 19:14:13 +0000, Alan Cox wrote: > I posted a proposal for this sometime ago because X has some uses for > it. The idea being you'd pass a struct that describes > > 1. What tells you an IRQ occurred on this device > 2. How to clear it > 3. How to enable/disable it. > > Something like > > struct { > u8 type; /* 8, 16, 32 I/O or MMIO */ > u8 bar; /* PCI bar to use */ > u32 offset; /* Into bar */ > u32 mask; /* Bits to touch/compare */ > u32 value; /* Value to check against/set */ > } > It might useful to add this to the main kernel API, and then over time modify all of the drivers to use it. If a driver does this it would be safe to transparently move it to user space like in UML or xen. I've been told that PCI Express and MSI does not have this problem. > > -- Keir > > -- Jon Smirl jonsmirl@gmail.com ------------------------------------------------------- SF email is sponsored by - The IT Product Guide Read honest & candid reviews on hundreds of IT Products from real users. Discover which products truly live up to the hype. Start reading now. http://ads.osdn.com/?ad_id=6595&alloc_id=14396&op=click