From: Jan Beulich <jbeulich@suse.com>
To: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH 1/2] x86/msi: passthrough all MSI-X vector ctrl writes to device model
Date: Tue, 15 Nov 2022 14:54:51 +0100 [thread overview]
Message-ID: <9f0cbeb9-a3c7-930a-64b8-db5d75abe9da@suse.com> (raw)
In-Reply-To: <Y3N53MIP8D0k/JXq@mail-itl>
On 15.11.2022 12:37, Marek Marczykowski-Górecki wrote:
> On Tue, Nov 15, 2022 at 10:36:32AM +0100, Jan Beulich wrote:
>> On 14.11.2022 20:20, Marek Marczykowski-Górecki wrote:
>>> Give all necessary information to QEMU by passing all ctrl writes,
>>> including masking a vector.
>>
>> Can we perhaps still avoid sending dword writes which don't change
>> the mask bit?
>
> Is it worth it? I don't think such writes are common (which I confirm
> observing debug log - every single write to maskbit Linux did was
> changing the value). The old value isn't readily available here.
For one a 2nd aspect would be Windows behavior. As you've seen in
the hypervisor code somebody back at the time even thought
accelerating reads was useful. I'm going from that rather than
knowing for sure that such an optimization would help anywhere.
>>> --- a/xen/arch/x86/hvm/vmsi.c
>>> +++ b/xen/arch/x86/hvm/vmsi.c
>>> @@ -271,7 +271,8 @@ out:
>>> }
>>>
>>> static int msixtbl_write(struct vcpu *v, unsigned long address,
>>> - unsigned int len, unsigned long val)
>>> + unsigned int len, unsigned long val,
>>> + bool completion)
>>> {
>>
>> I'd like to propose an alternative approach without an extra parameter:
>> Have msix_write_completion() pass 0 for "len" and move the initial
>> check
>>
>> if ( (len != 4 && len != 8) || (address & (len - 1)) )
>> return r;
>>
>> into _msixtbl_write(). Then ...
>>
>>> @@ -343,7 +344,7 @@ static int msixtbl_write(struct vcpu *v, unsigned long address,
>>>
>>> unlock:
>>> spin_unlock_irqrestore(&desc->lock, flags);
>>> - if ( len == 4 )
>>> + if ( len == 4 && completion )
>>> r = X86EMUL_OKAY;
>>
>> ... this could simply be "if ( !len )", seeing that even with your
>> approach it could simply be "if ( completion )".
>
> I find such usage of magic len=0 confusing. It would change the meaning
> of "len" from "write length" to "write length, unless it's 0 - then
> write length is 4 and it's called from msix_write_completion.
> Is there any real value from avoiding extra parameter?
Perhaps a matter of taste, but to me redundant parameters are odd
at times as well - often I end up wondering in such cases why an
extra parameter was introduced when things could easily be done
with what was there. In the specific case here there's also the
further aspect of you moving the function across the boundary of
all arguments fitting in registers available for parameter passing
(which of course only matters if the compiler decides to not
inline the function at all call sites).
Jan
prev parent reply other threads:[~2022-11-15 13:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-14 19:20 [PATCH 1/2] x86/msi: passthrough all MSI-X vector ctrl writes to device model Marek Marczykowski-Górecki
2022-11-14 19:21 ` [PATCH 2/2] x86/msi: Allow writes to registers on the same page as MSI-X table Marek Marczykowski-Górecki
2022-11-17 16:34 ` Jan Beulich
2022-11-17 17:31 ` Marek Marczykowski-Górecki
2022-11-18 7:20 ` Jan Beulich
2022-11-18 12:19 ` Marek Marczykowski-Górecki
2022-11-18 12:33 ` Jan Beulich
2022-11-18 13:00 ` Marek Marczykowski-Górecki
2022-11-18 13:07 ` Jan Beulich
2022-11-15 9:36 ` [PATCH 1/2] x86/msi: passthrough all MSI-X vector ctrl writes to device model Jan Beulich
2022-11-15 11:37 ` Marek Marczykowski-Górecki
2022-11-15 13:54 ` Jan Beulich [this message]
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