From: Eric Auger <eric.auger@redhat.com>
To: Khushit Shah <khushit.shah@nutanix.com>,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
kvmarm@lists.linux.dev
Cc: cohuck@redhat.com, peter.maydell@linaro.org,
richard.henderson@linaro.org, maz@kernel.org,
oliver.upton@linux.dev, berrange@redhat.com, abologna@redhat.com,
jdenemar@redhat.com, gshan@redhat.com, skolothumtho@nvidia.com,
sebott@redhat.com, armbru@redhat.com, philmd@linaro.org,
yangjinqian1@huawei.com, shaju.abraham@nutanix.com,
mark.caveayland@nutanix.com, ping@khushitshah.com,
sandesh.patel@nutanix.com
Subject: Re: [RFC PATCH v4 05/25] target/arm/kvm: read all ID registers from KVM
Date: Thu, 24 Sep 2026 09:52:09 +0200 [thread overview]
Message-ID: <9f40a560-dccb-4c14-b6d0-2dfbd64badba@redhat.com> (raw)
In-Reply-To: <20260921123249.1708067-6-khushit.shah@nutanix.com>
Hi Khushit,
On 9/21/26 2:32 PM, Khushit Shah wrote:
> Try to read all ID registers from KVM. KVM may return ENOENT for
> registers that it does not support reading from userspace; ignore
> those registers. Some registers may still require special handling.
>
> This exposes a more complete host feature view to the management
> stack. For migration, both writable and non-writable ID registers
> must match.
>
> Add a tracepoint for ID register reads that fail with ENOENT.
>
> Signed-off-by: Khushit Shah <khushit.shah@nutanix.com>
> ---
> target/arm/kvm.c | 29 ++++++++++++++---------------
> target/arm/trace-events | 1 +
> 2 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/target/arm/kvm.c b/target/arm/kvm.c
> index f8d349a461..d9d0623a2a 100644
> --- a/target/arm/kvm.c
> +++ b/target/arm/kvm.c
> @@ -330,12 +330,12 @@ static int kvm_feature_idx_to_idregs_idx(int kidx)
> }
>
> /*
> - * get_host_cpu_idregs: Read all the writable ID reg host values
> + * get_host_cpu_idregs: Read all the ID reg host values
> *
> - * Need to be called once the writable mask has been populated
> - * Note we may want to read all the known id regs but some of them are not
> - * writable and return an error, hence the choice of reading only those which
> - * are writable. Those are also readable!
> + * We currently try to read all the registers. If the read fails with
> + * ENOENT (KVM does not identify the ID register) ignore it.
> + * Some of the registers that errored with ENOENT will anyway need special
> + * handling.
> */
> static int get_host_cpu_idregs(int fd, ARMHostCPUFeatures *ahcf)
In the parent series I can add a parameter to select if we want only
writable id regs to be read or all id regs
> {
> @@ -348,19 +348,18 @@ static int get_host_cpu_idregs(int fd, ARMHostCPUFeatures *ahcf)
> uint64_t *reg;
> int ret;
>
> - if (!sysregdesc->writable_mask) {
> - continue;
> - }
> -
> reg = &ahcf->isar.idregs[i];
> ret = read_sys_reg64(fd, reg, idregs_sysreg_to_kvm_reg(sysreg));
> - trace_get_host_cpu_idregs(sysregdesc->name, *reg);
> if (ret) {
> - error_report("%s error reading value of host %s register (%m)",
> - __func__, sysregdesc->name);
> -
> - err = ret;
> + if (errno == ENOENT) {
> + trace_get_host_cpu_idreg_not_found(sysregdesc->name);
> + } else {
> + error_report("%s error reading value of host %s register"
> + " (%m)", __func__, sysregdesc->name);
> + err = ret;
> + }
> }
> + trace_get_host_cpu_idregs(sysregdesc->name, *reg);
> }
> return err;
> }
> @@ -482,7 +481,7 @@ kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
> SET_IDREG(&ahcf->isar, ID_AA64PFR0, 0x00000011); /* EL1&0, AArch64 only */
> err = 0;
> } else {
> - /* Make sure all writable ID reg values are initialized */
> + /* Try to read all the ID registers */
> err |= get_host_cpu_idregs(fd, ahcf);
>
> /*
> diff --git a/target/arm/trace-events b/target/arm/trace-events
> index bbf2e5dfa2..2bb7766f7f 100644
> --- a/target/arm/trace-events
> +++ b/target/arm/trace-events
> @@ -14,6 +14,7 @@ arm_gt_update_irq(int timer, int irqstate) "gt_update_irq: timer %d irqstate %d"
> # kvm.c
> kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova = 0x%"PRIx64" is translated into 0x%"PRIx64
> get_host_cpu_idregs(const char *name, uint64_t value) "scratch vcpu host value for %s is 0x%"PRIx64
> +get_host_cpu_idreg_not_found(const char *name) "host %s register not readable from KVM"
> kvm_arm_writable_idregs_to_cpreg_list(const char *name, uint64_t previous, uint64_t new) "%s overwrite default 0x%"PRIx64" with 0x%"PRIx64
> kvm_idreg_write_scratch_vcpu(const char *name, uint64_t oldfv, uint64_t newfv, uint64_t actualfv) "successful dry-run for %s old=0x%"PRIx64" new=0x%"PRIx64" actual=0x%"PRIx64
>
Eric
next prev parent reply other threads:[~2026-09-24 7:53 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 12:32 [RFC PATCH v4 00/25] named CPU models for Arm64 on KVM Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 01/25] target/arm: expose SYSREG_ props for REVIDR_EL1 and AIDR_EL1 Khushit Shah
2026-09-23 16:22 ` Eric Auger
2026-09-29 12:54 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 02/25] target/arm: expose all non-res ID reg fields as properties Khushit Shah
2026-09-23 16:37 ` Eric Auger
2026-09-24 6:46 ` Eric Auger
2026-09-29 12:55 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 03/25] target/arm: move SYSREG_ prop infra to cpu64.c Khushit Shah
2026-09-24 6:54 ` Eric Auger
2026-09-29 12:56 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 04/25] target/arm/kvm: enable writable implementation ID registers Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 05/25] target/arm/kvm: read all ID registers from KVM Khushit Shah
2026-09-24 7:52 ` Eric Auger [this message]
2026-09-21 12:32 ` [RFC PATCH v4 06/25] target/arm/kvm: handle special ID registers when reading " Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 07/25] target/arm/kvm: process ID register writeback per field Khushit Shah
2026-09-24 9:41 ` Eric Auger
2026-09-21 12:32 ` [RFC PATCH v4 08/25] target/arm/kvm: handle writeback for special ID register fields Khushit Shah
2026-09-24 9:57 ` Eric Auger
2026-09-24 10:21 ` Khushit Shah
2026-09-24 11:47 ` Eric Auger
2026-09-29 13:09 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 09/25] target/arm: introduce named CPU model infrastructure Khushit Shah
2026-09-24 13:35 ` Eric Auger
2026-09-29 13:40 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 10/25] target/arm: fix SVE and PAuth finalize for named CPU models Khushit Shah
2026-10-15 13:01 ` Eric Auger
2026-10-16 7:34 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 11/25] target/arm: disable PMU support " Khushit Shah
2026-10-15 13:12 ` Eric Auger
2026-10-22 8:03 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 12/25] target/arm: add arm-v9.0-a-v1 named CPU model Khushit Shah
2026-10-16 12:07 ` Eric Auger
2026-10-16 12:24 ` Peter Maydell
2026-10-22 10:44 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 13/25] target/arm: add neoverse-v2-v1 " Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 14/25] target/arm: add neoverse-v2-v2 " Khushit Shah
2026-10-15 12:13 ` Eric Auger
2026-10-15 12:22 ` Peter Maydell
2026-10-15 14:05 ` Eric Auger
2026-10-16 6:48 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 15/25] target/arm: add graviton4-v1 " Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 16/25] target/arm: add grace-v1 " Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 17/25] target/arm: fail named CPU models on unknown non-zero feature ID regs Khushit Shah
2026-10-16 12:27 ` Eric Auger
2026-10-22 11:15 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 18/25] target/arm: add cpu-models-stub.c Khushit Shah
2026-09-29 15:00 ` Philippe Mathieu-Daudé
2026-09-29 15:37 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 19/25] target/arm/qmp: allow named CPU models on cpu-model-expansion Khushit Shah
2026-10-16 12:32 ` Eric Auger
2026-09-21 12:32 ` [RFC PATCH v4 20/25] target/arm/kvm: compute host-supported values for ID register fields Khushit Shah
2026-10-16 13:10 ` Eric Auger
2026-10-23 6:25 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 21/25] target/arm: report 0 as supported for ID fields gated by vCPU init flags Khushit Shah
2026-10-16 13:12 ` Eric Auger
2026-10-22 11:22 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 22/25] target/arm/kvm: add kvm_arm_get_host_isar helper Khushit Shah
2026-09-29 15:02 ` Philippe Mathieu-Daudé
2026-09-21 12:32 ` [RFC PATCH v4 23/25] qmp: add query-cpu-props-info command Khushit Shah
2026-10-15 14:20 ` Eric Auger
2026-10-16 6:57 ` Khushit Shah
2026-10-16 7:18 ` Eric Auger
2026-10-16 7:28 ` Khushit Shah
2026-09-21 12:32 ` [RFC PATCH v4 24/25] target/arm/qmp: implement query-cpu-props-info for KVM Khushit Shah
2026-10-16 13:21 ` Eric Auger
2026-10-16 13:23 ` Eric Auger
2026-09-21 12:32 ` [RFC PATCH v4 25/25] target/arm/qmp: hook blockers in query-cpu-definitions Khushit Shah
2026-10-16 13:54 ` Eric Auger
2026-10-22 11:44 ` Khushit Shah
2026-09-29 15:09 ` [RFC PATCH v4 00/25] named CPU models for Arm64 on KVM Philippe Mathieu-Daudé
2026-09-29 16:38 ` Khushit Shah
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