From: Baolu Lu <baolu.lu@linux.intel.com>
To: Michal Camacho Romero <michal.camacho.romero@intel.com>,
Ning Sun <ning.sun@intel.com>, Thomas Gleixner <tglx@kernel.org>
Cc: baolu.lu@linux.intel.com, x86@kernel.org, iommu@lists.linux.dev,
tboot-devel@lists.sourceforge.net, linux-kernel@vger.kernel.org,
Mateusz Mowka <mateusz.mowka@intel.com>,
Adam Pawlicki <adamx.pawlicki@intel.com>,
Pawel Randzio <pawel.randzio@intel.com>
Subject: Re: [PATCH v1 2/2] iommu/vt-d: Disable PMRs and skip force-IOMMU when TXT TPRs are active
Date: Thu, 11 Jun 2026 16:49:47 +0800 [thread overview]
Message-ID: <9f79de94-01ac-4504-baf6-f5d59e77a954@linux.intel.com> (raw)
In-Reply-To: <20260603114500.2771319-3-michal.camacho.romero@intel.com>
On 6/3/2026 7:45 PM, Michal Camacho Romero wrote:
> When Intel TXT Protection Regions (TPRs) are present in the DTPR table,
> hardware-level DMA protection is already enforced by the SINIT ACM.
> In this case:
>
> - Skip forcing IOMMU enablement in tboot_force_iommu(), since TPRs
> already provide DMA protection.
> - Tear down PMRs during intel_iommu_init() when TPRs are active,
> while PMRs are redundant with TPR-based protection.
> - Call tboot_parse_dtpr_table() from parse_dmar_table() to disable
> TPR regions early, allowing the kernel to manage DMA protection
> prior to the OS boot.
>
> Link: https://uefi.org/sites/default/files/resources/633933_Intel_TXT_DMA_Protection_Ranges_rev_0p73.pdf
> Link: https://cdrdv2-public.intel.com/315168/315168_TXT_MLE_DG_rev_017_7.pdf
> Signed-off-by: Michal Camacho Romero <michal.camacho.romero@intel.com>
> ---
> drivers/iommu/intel/dmar.c | 12 ++++++++++++
> drivers/iommu/intel/iommu.c | 8 +++++++-
> 2 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
> index d33c119a935e..3ab09117c79e 100644
> --- a/drivers/iommu/intel/dmar.c
> +++ b/drivers/iommu/intel/dmar.c
> @@ -635,6 +635,8 @@ static int __init
> parse_dmar_table(void)
> {
> struct acpi_table_dmar *dmar;
> + struct acpi_table_dtpr *dtpr;
> + void *txt_heap;
Please avoid using extra whitespace before the variable name. Just use:
void *txt_heap;
> int drhd_count = 0;
> int ret;
> struct dmar_res_callback cb = {
> @@ -670,6 +672,16 @@ parse_dmar_table(void)
> return -EINVAL;
> }
>
> + dtpr = tboot_get_dtpr_table(&txt_heap);
> + if (dtpr) {
> + /* TPR is enabled
> + * This will also tell not to establish IOMMU PMRs
> + */
Please use the standard kernel multiple-line comment format:
/*
* TPR is enabled. This will also tell not to establish IOMMU
* PMRs.
*/
> + tboot_parse_dtpr_table(dtpr);
> + iounmap(txt_heap);
> + }
> +
> + txt_heap = NULL;
> pr_info("Host address width %d\n", dmar->width + 1);
> ret = dmar_walk_dmar_table(dmar, &cb);
> if (ret == 0 && drhd_count == 0)
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 4d0e65bc131d..486693a13dc6 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -2540,6 +2540,12 @@ static __init int tboot_force_iommu(void)
> if (!tboot_enabled())
> return 0;
>
> + /* If TPR is enabled we don't need to force IOMMU,
> + * TPR set by SINIT ACM will take care of DMA protection
> + */
Ditto.
> + if (tboot_is_tpr_enabled())
> + return 0;
> +
> if (no_iommu || dmar_disabled)
> pr_warn("Forcing Intel-IOMMU to enabled\n");
>
> @@ -2597,7 +2603,7 @@ int __init intel_iommu_init(void)
> * calling SENTER, but the kernel is expected to reset/tear
> * down the PMRs.
> */
> - if (intel_iommu_tboot_noforce) {
> + if (intel_iommu_tboot_noforce || tboot_is_tpr_enabled()) {
> for_each_iommu(iommu, drhd)
> iommu_disable_protect_mem_regions(iommu);
> }
With these nits fixed:
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
next prev parent reply other threads:[~2026-06-11 8:49 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-03 11:44 [PATCH v1 0/2] x86/tboot: Add Intel TXT Protection Regions (TPR) support Michal Camacho Romero
2026-06-03 11:44 ` [PATCH v1 1/2] x86/tboot: Add support for parsing DTPR table and disabling TPRs Michal Camacho Romero
2026-06-03 11:45 ` [PATCH v1 2/2] iommu/vt-d: Disable PMRs and skip force-IOMMU when TXT TPRs are active Michal Camacho Romero
2026-06-11 8:49 ` Baolu Lu [this message]
2026-08-07 9:16 ` [PATCH v2 " Michal Camacho Romero
2026-08-07 10:14 ` Michal Camacho Romero
2026-08-20 3:28 ` Baolu Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9f79de94-01ac-4504-baf6-f5d59e77a954@linux.intel.com \
--to=baolu.lu@linux.intel.com \
--cc=adamx.pawlicki@intel.com \
--cc=iommu@lists.linux.dev \
--cc=linux-kernel@vger.kernel.org \
--cc=mateusz.mowka@intel.com \
--cc=michal.camacho.romero@intel.com \
--cc=ning.sun@intel.com \
--cc=pawel.randzio@intel.com \
--cc=tboot-devel@lists.sourceforge.net \
--cc=tglx@kernel.org \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.