From: "H. Peter Anvin" <hpa@zytor.com>
To: linux-kernel@vger.kernel.org
Subject: Re: Stupid PCI Bit-naming convention question
Date: 6 Dec 2001 15:51:49 -0800 [thread overview]
Message-ID: <9up0al$84m$1@cesium.transmeta.com> (raw)
In-Reply-To: <Pine.LNX.4.30.0112061732040.22686-100000@rtlab.med.cornell.edu>
Followup to: <Pine.LNX.4.30.0112061732040.22686-100000@rtlab.med.cornell.edu>
By author: "Calin A. Culianu" <calin@ajvar.org>
In newsgroup: linux.dev.kernel
>
> In my attempts to investigate whether or not my m/b is afflicted by the
> VIA KT266 hardware bug at device 1106:3099 register 0x95, bits 5,6,7, I
> have a dumb question: Namely, how are bits numbered?
>
> I would assume that bits are numbered from smallest value to largest,
> indexed at 0, so that bit 7 is the '128' component of a byte and bit 0 is
> the '1' component.. correct?
>
Yes.
-hpa
--
<hpa@transmeta.com> at work, <hpa@zytor.com> in private!
"Unix gives you enough rope to shoot yourself in the foot."
http://www.zytor.com/~hpa/puzzle.txt <amsp@zytor.com>
next prev parent reply other threads:[~2001-12-06 23:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-12-06 22:34 Stupid PCI Bit-naming convention question Calin A. Culianu
2001-12-06 23:51 ` H. Peter Anvin [this message]
-- strict thread matches above, loose matches on Subject: below --
2001-12-07 8:36 Zwane Mwaikambo
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