From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kumar Gala Date: Mon, 31 Jan 2011 15:28:39 -0600 Subject: [U-Boot] [PATCH 6/6] p1021mds: add QE and UEC support In-Reply-To: <1296507013.2049.506.camel@haiying-laptop> References: <1296499317-26616-1-git-send-email-Haiying.Wang@freescale.com> <1296499317-26616-7-git-send-email-Haiying.Wang@freescale.com> <20110131201154.B982BD4D67C@gemini.denx.de> <1296507013.2049.506.camel@haiying-laptop> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Jan 31, 2011, at 2:50 PM, Haiying Wang wrote: > On Mon, 2011-01-31 at 21:11 +0100, Wolfgang Denk wrote: >>> >>> +#ifdef CONFIG_P1021 >>> + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); >>> + >>> + /* QE9 and QE12 need to be set for enabling QE MII managment signals */ >>> + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE9); >>> + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12); >>> +#endif >> ... >> >> Can we please avoid having board specific code in common files? > I wish I could, but only P1021 has such pin mux problems. > >> If this is really necessary, it shoud be a feature-specific #define, >> not a board specific one. > I don't know whether this *feature* will show up on other SoC. But if > you insist, I can use CONFIG_QE_PIN_MUX. > > Thanks. > > Haiying I think pin muxing is a board level decision so it seems like board code is the right place for it. - k