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From: Aleksandar Markovic <Aleksandar.Markovic@mips.com>
Date: Mon, 22 Jan 2018 15:18:05 +0000
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Subject: Re: [Qemu-devel] [PATCH 3/7] Revert "target/mips: hold BQL for
 timer interrupts"
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To: =?iso-8859-1?Q?Alex_Benn=E9e?= <alex.bennee@linaro.org>, Aleksandar
	Markovic <aleksandar.markovic@rt-rk.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>, Aurelien Jarno <aurelien@aurel32.net>, Fam Zheng <famz@redhat.com>, Gerd Hoffmann <kraxel@redhat.com>, Laurent Vivier <laurent@vivier.eu>, Paolo Bonzini <pbonzini@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, =?iso-8859-1?Q?Philippe_Mathieu-Daud=E9?= <f4bug@amsat.org>, Richard
	Henderson <rth@twiddle.net>, Riku Voipio <riku.voipio@iki.fi>, Yongbok Kim <Yongbok.Kim@mips.com>, Goran Ferenc <Goran.Ferenc@mips.com>, Miodrag Dinic <Miodrag.Dinic@mips.com>, Petar Jovanovic <Petar.Jovanovic@mips.com>

> From: Alex Benn=E9e [alex.bennee@linaro.org]=0A=
> =0A=
> > From: Aleksandar Markovic <aleksandar.markovic@mips.com>=0A=
> >=0A=
> > This reverts commit d394698d73836d1c50545bdb32dc58d09708fcfb.=0A=
> >=0A=
> > Ther revert is needed in order not to cause overlap with subsequent=0A=
> > patches related to handling synchronization of interrupt code paths.=0A=
> =0A=
> Hmm I'm fairly sure you should merge this with the follow-up patch to=0A=
> add BQL locking to the appropriate place. Otherwise you break=0A=
> bi-section.=0A=
=0A=
Thanks for the review, Alex!=0A=
=0A=
You are right, the bisect would have been broken. I am going to merge this =
and=0A=
subsequent patch in v2.=0A=
=0A=
I am going to address all your other concerns in v2 as well.=0A=
=0A=
Regards,=0A=
Aleksandar=