From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keir Fraser Subject: Re: [PATCH] 3/3: MCA/MCE correctable error handling Date: Thu, 23 Aug 2007 15:07:44 +0100 Message-ID: References: <200708230857.29134.Christoph.Egger@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <200708230857.29134.Christoph.Egger@amd.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Christoph Egger , xen-devel@lists.xensource.com Cc: Gavin.Maltby@sun.com, Jan Beulich List-Id: xen-devel@lists.xenproject.org On 23/8/07 07:57, "Christoph Egger" wrote: >> Oh, and is AMD-specific code really needed in non-fatal.c? I though the MCA >> stuff was architectural now rather than vendor specific? If there are >> vendor-specific extensions then they belong in the vendor's .c file. > > AMD-specific is the use of the hw register code. Intel has some additional > machine check MSR's containing the register set. Intel may add a structure > to patch 2/3 that make use of them. Should I move the amd polling handler to > amd.c ? I think so. -- Keir