From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keir Fraser Subject: Re: [PATCH] [RFC] More fp instructions for realmode emulation (Enables booting OS/2 as a HVM guest on Intel/VT hardware) Date: Mon, 03 Mar 2008 17:30:13 +0000 Message-ID: References: <20080303165929.GC9853@one.firstfloor.org> Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20080303165929.GC9853@one.firstfloor.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Andi Kleen Cc: xen-devel , Trolle Selander List-Id: xen-devel@lists.xenproject.org On 3/3/08 16:59, "Andi Kleen" wrote: >>> Yes you definitely need to. That was a kernel crash bug on native Linux >>> some time ago... >>> >>> Also you need to do the same for any FXSAVEs/FXRSTORs if you haven't >>> already. >> >> FXSAVE/FXRSTOR do not flush pending FPU exceptions, right? > > Yes they do not, but there are other ways to make them #GP We don't trust FXRSTOR but we do trust FXSAVE. The AMD manual says that FXRSTOR will #GP if 1s are written to MXCSR reserved bits, but I take this to be a cut-and-paste typo since FXSAVE does not write to MXCSR. If there's real evidence of FXSAVE causing #GP dependent on current FPU state, I'd be very happy to find out about it! -- Keir