From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keir Fraser Subject: Re: [PATCH] softtsc (was RE: Guest TSC and Xen (Intel and AMD feedback please)) Date: Thu, 10 Jul 2008 10:18:57 +0100 Message-ID: References: <20080709153251828.00000003744@djm-pc> Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20080709153251828.00000003744@djm-pc> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: "dan.magenheimer@oracle.com" , "Zhang, Li" , "Xen-Devel (E-mail)" Cc: "Tian, Kevin" List-Id: xen-devel@lists.xenproject.org On 9/7/08 22:32, "Dan Magenheimer" wrote: > The attached patch adds a new Xen boot option "softtsc" that > causes all hvm domains to trap and emulate all rdtsc instructions > and fetch Xen system time instead of the hardware tsc. As > a result, the processor will appear to be running at 1000.xyz MHz > (where xyz indicates some fraction that seems to vary slightly > across different boots). I've also added a line of output to > "xm debug-key t" to report softsc and tsc-related CPU features. > > (Keir, though 3.3 functionality freeze is past, this is more of a > diagnostic aid and defaults off, so I don't know if you would > consider it for 3.3.) Yes, I will take it, but have the following comments. 1. Why do you define new boolean 'constant_tsc'? Can you just use test_bit(X86_FEATURE_CONSTANT_TSC)? 2. Your change in common/keyhandler.c breaks ia64. :-) 3. Your change to arch/x86/time.c looks unnecessary. 4. Should you catch SVM's RDTSCP vmexit as well as RDTSC? -- Keir