From mboxrd@z Thu Jan  1 00:00:00 1970
From: Keir Fraser <keir.fraser@eu.citrix.com>
Subject: Re: HVM windows - PCI IRQ firing on both CPU's
Date: Mon, 18 Aug 2008 13:26:50 +0100
Message-ID: <C4CF291A.26177%keir.fraser@eu.citrix.com>
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To: James Harper <james.harper@bendigoit.com.au>, xen-devel@lists.xensource.com
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On 18/8/08 13:19, "James Harper" <james.harper@bendigoit.com.au> wrote:

> Just so I understand, even if I see the IRQ on CPU1, I should always
> treat it as if it came in on CPU0?

Yes. Only vcpu0's event-channel logic is wired into the virtual PIC/IOAPIC.
Even if the IOAPIC then forwards the interrupt to a different VCPU, it's
still vcpu0's event-channel status that initiated the interrupt. Other
vcpus' event-channel statuses do not cause interrupts in HVM.

> The lack of that would explain what I'm seeing.

It sure would.

 -- Keir