From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keir Fraser Subject: Re: Multiple IRQ's in HVM for Windows Date: Sun, 28 Dec 2008 08:39:00 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: James Harper , xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org On 28/12/2008 03:22, "James Harper" wrote: >> Yes, that did occur to me. Might be a nice fallback while still > allowing >> up >> to 16 or whatever devices to have their interrupts distributed across >> VCPUs. >> The old mechanism does still need to work, so making it a fallback in > this >> new mechanism would be probably not too difficult. > > I've been reading up on APIC's, and it appears that (depending on the > model) they can support up to 64 interrupts. Is the emulated APIC under > Xen of the 16 interrupt variety? The IO-APIC has 48 pins, 16 of which are mapped for legacy ISA, so there are 32 non-legacy pins. Actually we could have more, but that creates backward-compatibility issues now. 32 should be enough for most uses! -- Keir