From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keir Fraser Subject: Re: question about patch 13252 Date: Thu, 19 Mar 2009 14:22:39 +0000 Message-ID: References: <8FED46E8A9CA574792FC7AACAC38FE7701CB8168A6@PDSMSX501.ccr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <8FED46E8A9CA574792FC7AACAC38FE7701CB8168A6@PDSMSX501.ccr.corp.intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: "Lu, Guanqun" , "jbeulich@novell.com" Cc: =?GB2312?B?eGVuLWRldmVs1+k=?= List-Id: xen-devel@lists.xenproject.org On 19/03/2009 14:07, "Lu, Guanqun" wrote: > I have such question about the number 11, 11 is 1010 in binary format, Try again. :D > which means that the busy flat is set. Then later, load_TR() is called. > load_TR() is a wrapper around instruction 'ltr'. As I consult SDM2A, > it says that ltr will generate #GP, when the busy flag is set. > > So I'm a little puzzled. Can you explain a little why it's not 9 ? > Or am I missing something here? We only execute LTR once at start of day for each CPU. This is done while running on the non-compat gdt_table. When we switch to compat_gdt_table we do not do any LTR switch. I suppose Jan sets the busy bit to match what will be in the non-compat table after we have executed our one-off LTR. -- Keir