From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keir Fraser Subject: Re: [PATCH] pvcpuid: mask TSC invariant bit for various circumstances Date: Wed, 28 Oct 2009 17:29:03 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Dan Magenheimer , Jan Beulich , "Xen-Devel (E-mail)" List-Id: xen-devel@lists.xenproject.org Yes, CPUID is always trapped for HVM guests. -- Keir On 28/10/2009 16:50, "Dan Magenheimer" wrote: > Hmmm... this could be a real problem for some apps! > > Is this only a problem for PV domains? I.e, is cpuid > always trapped by Xen for HVM domains? > >> -----Original Message----- >> From: Jan Beulich [mailto:JBeulich@novell.com] >> Sent: Wednesday, October 28, 2009 10:39 AM >> To: Keir Fraser; Xen-Devel (E-mail); Dan Magenheimer >> Subject: RE: [Xen-devel] [PATCH] pvcpuid: mask TSC invariant bit for >> various circumstances >> >>>>> Dan Magenheimer 28.10.09 17:27 >>> >>> But, that said, I'm still not convinced my patch is the >>> right answer. If possible (e.g. using the CPUID masking >>> feature Jan referred to), Xen should always hide the TSC >> >> Actually I just realized that this feature would probably not help you >> at all: The bit you're after is in leaf 0x80000007, but the >> masking applies >> only to leaf 1 (plus 0x80000001 for AMD). >> >>> Invariant bit from all guests (OS's and apps) and only >>> expose it via pvcpuid or some other mechanism. >>> Otherwise an OS or app may make false assumptions >>> based on an architecturally-specified cpuid bit. >> >> Jan >> >>