From mboxrd@z Thu Jan  1 00:00:00 1970
From: Keir Fraser <keir@xen.org>
Subject: Re: [PATCH] VPMU issue on Nehalem cpus
Date: Mon, 22 Nov 2010 09:28:57 +0000
Message-ID: <C90FE859.AC00%keir@xen.org>
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To: Jan Beulich <JBeulich@novell.com>, Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>
Cc: xen-devel@lists.xensource.com, Haitao Shan <haitao.shan@intel.com>
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On 22/11/2010 09:19, "Jan Beulich" <JBeulich@novell.com> wrote:

>>>> +    val = msr_content & ((1 << num_gen_pmc) - 1);
>>> 
>>> What's the point of masking if the subsequent loop looks at the
>>> bottom so many bits only anyway?
>> 
>> Bits 0-31 flag the overflow of the general counters (currently max 4) and
>> 32-63
>> flag the overflow of the fixed counter (currently max 3).
>> Yes the first mask is not necessary, maybe a comment would be better?
> 
> Neither is the second mask (below) - the shift is all that's really
> needed. Afaic, a comment doesn't seem necessary, but Keir
> may by of different opinion here.

It's clear from the code that the mask operation is unnecessary. No code
comment required.

 -- Keir