From: Keir Fraser <keir@xen.org>
To: Andre Przywara <andre.przywara@amd.com>
Cc: xen-devel <xen-devel@lists.xensource.com>
Subject: Re: [PATCH 5/5] svm: implement INVLPG part of DecodeAssist
Date: Mon, 18 Apr 2011 10:07:24 +0100 [thread overview]
Message-ID: <C9D1BDDC.2CB7B%keir@xen.org> (raw)
In-Reply-To: <4DA838FC.5010606@amd.com>
On 15/04/2011 13:24, "Andre Przywara" <andre.przywara@amd.com> wrote:
> Newer SVM implementations (Bulldozer) give the desired address on
> a INVLPG intercept explicitly in the EXITINFO1 field of the VMCB.
> Use this address to avoid a costly instruction fetch and deocde
> cycle.
> Only useful with shadow paging.
Applied as c/2 23236. Fixed to not handle the INVLPGA exit code.
-- Keir
> Signed-off-by: Andre Przywara <andre.przywara@amd.com>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xensource.com
> http://lists.xensource.com/xen-devel
prev parent reply other threads:[~2011-04-18 9:07 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-04-15 12:16 [PATCH 0/5] svm: implement new DecodeAssist feature Andre Przywara
2011-04-15 12:21 ` [PATCH 1/5] vmx/hvm: move mov-cr handling functions to generic HVM code Andre Przywara
2011-04-18 8:48 ` Keir Fraser
2011-04-15 12:21 ` [PATCH 2/5] svm: add bit definitions for SVM DecodeAssist Andre Przywara
2011-04-15 12:22 ` [PATCH 3/5] svm: implement instruction fetch part of DecodeAssist Andre Przywara
2011-04-18 9:10 ` Keir Fraser
2011-04-18 12:37 ` Keir Fraser
2011-04-15 12:23 ` [PATCH 4/5] svm: implement CR access " Andre Przywara
2011-04-15 12:24 ` [PATCH 5/5] svm: implement INVLPG " Andre Przywara
2011-04-18 9:07 ` Keir Fraser [this message]
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