From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keir Fraser Subject: Re: [PATCH] X86: cpuid faulting feature enable Date: Mon, 04 Jul 2011 07:58:01 +0100 Message-ID: References: <04F972F38B3C4E4E91C4697DA8BF9F526B9906D11D@shsmsx502.ccr.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <04F972F38B3C4E4E91C4697DA8BF9F526B9906D11D@shsmsx502.ccr.corp.intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: "Shan, Haitao" , "Tian, Kevin" , "Liu, Jinsong" , "xen-devel@lists.xensource.com" Cc: "Li, Xin" List-Id: xen-devel@lists.xenproject.org On 04/07/2011 02:06, "Shan, Haitao" wrote: > diff -r 177ddb2f4ebf -r 71b58748cfee xen/arch/x86/cpu/cpu.h > --- a/xen/arch/x86/cpu/cpu.h Fri Jul 01 20:48:00 2011 +0100 > +++ b/xen/arch/x86/cpu/cpu.h Fri Jul 01 22:28:53 2011 +0100 > @@ -30,4 +30,4 @@ extern void display_cacheinfo(struct cpu > extern void generic_identify(struct cpuinfo_x86 * c); > > extern void early_intel_workaround(struct cpuinfo_x86 *c); > - > +extern void intel_cpuid_faulting_flip(unsigned int enable); > > Should we remove this part at all? Seems it is not used now. Done. Thanks. > Shan Haitao > > -----Original Message----- > From: Keir Fraser [mailto:keir.xen@gmail.com] > Sent: Saturday, July 02, 2011 3:50 PM > To: Tian, Kevin; Liu, Jinsong; xen-devel@lists.xensource.com > Cc: Shan, Haitao; Li, Xin > Subject: Re: [PATCH] X86: cpuid faulting feature enable > > On 02/07/2011 04:15, "Tian, Kevin" wrote: > >>> From: Keir Fraser [mailto:keir.xen@gmail.com] On Behalf Of Keir >>> Fraser >>> Sent: Saturday, July 02, 2011 5:31 AM >>> >>> On 01/07/2011 15:32, "Liu, Jinsong" wrote: >>> >>>> X86: cpuid faulting feature enable >>>> >>>> Latest Intel processor add cpuid faulting feature. This patch is >>>> used to support cpuid faulting in Xen. >>>> Like cpuid spoofing, cpuid faulting mainly used to support live migration. >>>> When cpl>0, cpuid instruction will produce GP, vmm then emulate >>>> execution >>> of >>>> the cpuid instruction. Hence will appear to guest software the value >>>> chosen >>> by >>>> the vmm. >>> >>> I fixed this up quite a bit and applied as c/s 23653. Please take a >>> look and give it a test. In particular note the changes I made in >>> intel_init(), to make sure that APs are at least as featureful as the >>> BSP w.r.t. cpuid faulting. >>> >> >> 2.42 + } else if (boot_cpu_has(X86_FEATURE_CPUID_FAULTING)) { >> 2.43 + BUG_ON(!probe_intel_cpuid_faulting()); >> 2.44 + set_bit(X86_FEATURE_CPUID_FAULTING, c->x86_capability); >> 2.45 + } >> 2.46 + >> 2.47 + if (!cpu_has_cpuid_faulting) >> 2.48 + set_cpuidmask(c); >> 2.49 + >> 2.50 + BUG_ON(cpu_has(c, X86_FEATURE_CPUID_FAULTING) != >> 2.51 + boot_cpu_has(X86_FEATURE_CPUID_FAULTING)); >> >> the latter BUG_ON is useless since if AP is inconsistent with BSP we >> already get bug triggered in earlier BUG_ON. > > Oops, I forgot to remove the redundant second BUG_ON. I'll do that now. > Thanks! > > -- Keir > >> Thanks >> Kevin > >