From: Dan Williams <djbw@fb.com>
To: Jon Mason <jon.mason@intel.com>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Vinod Koul <vinod.koul@intel.com>,
Dave Jiang <dave.jiang@intel.com>
Subject: Re: [PATCH 09/15] NTB: Use DMA Engine to Transmit and Receive
Date: Tue, 20 Aug 2013 00:45:54 +0000 [thread overview]
Message-ID: <CE380608.2597D%djbw@fb.com> (raw)
In-Reply-To: <20130820000734.GD22169@jonmason-lab>
On 8/19/13 5:07 PM, "Jon Mason" <jon.mason@intel.com> wrote:
>> >> Is this for the case where we are bouncing back and forth between
>> >> sync/async? Otherwise I do not see how transactions could get out of
>> >> order given you allocate a channel once per queue. Is this comment
>> >> saying that the iowrite32 is somehow a fix, or is this comment a
>> >> FIXME?
>> >
>> >There is a case for a mix, the "copy_bytes" variable above switches to
>> >CPU for small transfers (which greatly increases throughput on small
>> >transfers). The caveat to it is the need to flush the DMA engine to
>> >prevent out-of-order. This comment is mainly an reminder of this
>>issue.
>>
>> So this is going forward with the stall as a known issue? The next
>>patch
>> should just do the sync to prevent the re-ordering, right?
>
>There is already a dma_sync_wait in the error path of ntb_async_rx to
>enforce the ordering. Do I need to change the comment (or move it) to
>make it more obvious what is happening?
Yeah, I think it just needs to move to the dma_sync_wait() otherwise it
seems like it¹s an open issue that needs fixing.
>>>> > + txd->callback = ntb_rx_copy_callback;
>> >> > + txd->callback_param = entry;
>> >> > +
>> >> > + cookie = dmaengine_submit(txd);
>> >> > + if (dma_submit_error(cookie))
>> >> > + goto err3;
>> >> > +
>> >> > + qp->last_cookie = cookie;
>> >> > +
>> >> > + dma_async_issue_pending(chan);
>> >>
>> >> hmm... can this go in ntb_process_rx() so that the submission is
>> >> batched? Cuts down on mmio.
>> >
>> >I moved it down to ntb_transport_rx (after the calls to
>> >ntb_process_rxc), and the performance seems to be roughly the same.
>>
>> Yeah, not expecting it to be noticeable, but conceptually
>>
>> submit
>> submit
>> submit
>> submit
>> issue
>>
>>
>> Is nicer than:
>>
>> submit
>> issue
>> submit
>> issue
>>
>>
>
>I agree, but I liked having all the dma engine awareness
>compartmentalized in the ntb_async_* and callbacks.
Ok, makes sense.
--
Dan
next prev parent reply other threads:[~2013-08-20 0:45 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-02 17:35 [PATCH 00/15] NTB: Bug Fixes and New Features Jon Mason
2013-08-02 17:35 ` [PATCH 01/15] NTB: Add Error Handling in ntb_device_setup Jon Mason
2013-08-02 17:35 ` [PATCH 02/15] NTB: Correct Number of Scratch Pad Registers Jon Mason
2013-08-02 17:35 ` [PATCH 03/15] NTB: Correct USD/DSD Identification Jon Mason
2013-08-02 17:35 ` [PATCH 04/15] NTB: Correct debugfs to work with more than 1 NTB Device Jon Mason
2013-08-02 17:35 ` [PATCH 05/15] NTB: Xeon Errata Workaround Jon Mason
2013-08-02 17:35 ` [PATCH 06/15] NTB: BWD Link Recovery Jon Mason
2013-08-02 17:35 ` [PATCH 07/15] NTB: Update Device IDs Jon Mason
2013-08-02 17:35 ` [PATCH 08/15] NTB: Enable 32bit Support Jon Mason
2013-08-02 17:35 ` [PATCH 09/15] NTB: Use DMA Engine to Transmit and Receive Jon Mason
2013-08-19 9:41 ` Dan Williams
2013-08-19 10:01 ` Dan Williams
2013-08-19 20:37 ` Jon Mason
2013-08-19 23:36 ` Dan Williams
2013-08-20 0:07 ` Jon Mason
2013-08-20 0:45 ` Dan Williams [this message]
2013-08-02 17:35 ` [PATCH 10/15] NTB: Rename Variables for NTB-RP Jon Mason
2013-08-02 17:35 ` [PATCH 11/15] NTB: NTB-RP support Jon Mason
2013-08-02 17:35 ` [PATCH 12/15] NTB: Remove References of non-B2B BWD HW Jon Mason
2013-08-02 17:35 ` [PATCH 13/15] NTB: Comment Fix Jon Mason
2013-08-02 17:35 ` [PATCH 14/15] NTB: Update Version Jon Mason
2013-08-02 17:35 ` [PATCH 15/15] MAINTAINERS: Add Website and Git Tree for NTB Jon Mason
2013-08-02 18:04 ` [PATCH 00/15] NTB: Bug Fixes and New Features Joe Perches
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