From mboxrd@z Thu Jan 1 00:00:00 1970 From: Keir Fraser Subject: Re: [PATCH 4/4] SVM: streamline entry.S code Date: Mon, 26 Aug 2013 18:20:20 +0100 Message-ID: References: <521B8037.3090809@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1VE0So-0004Pj-UW for xen-devel@lists.xenproject.org; Mon, 26 Aug 2013 17:20:27 +0000 Received: by mail-wi0-f182.google.com with SMTP id ey11so760890wid.9 for ; Mon, 26 Aug 2013 10:20:25 -0700 (PDT) In-Reply-To: <521B8037.3090809@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Andrew Cooper , Jan Beulich Cc: xen-devel , Boris Ostrovsky , Jacob Shin , suravee.suthikulpanit@amd.com List-Id: xen-devel@lists.xenproject.org On 26/08/2013 17:20, "Andrew Cooper" wrote: > Having read the manual several times, I am now more and more confused about > this. > > My reading of the AMD programmer manual vol 3 indicates that %rax after VMRUN > completes will be the host %rax, i.e. VCPU_svm_vmcb_pa. Yes. > However, I cant find anywhere in the code which overwrites regs->rax from > vmcb->rax, which I would have thought would have thought would cause utter > devastation in combination with the generic functions working with a > cpu_user_regs structure. It's right there in entry.S: 'mov VMCB_rax(%rcx),%rax; mov %rax,UREGS_rax(%rsp)' > The alternative is that %rax after VMRUN is actually the guest %rax, at which > point the pushes used to do the correct thing, but are now broken by this > patch clobbering it before being saved. > > Can someone with more knowledge please confirm? I really hope I have > overlooked something in the code. :) -- Keir