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charset=UTF-8 Date: Fri, 02 Jun 2023 16:54:10 +1000 Message-Id: Cc: , "Daniel Henrique Barboza" Subject: Re: [RFC PATCH 2/5] target/ppc: Add initial flags and helpers for SMT support From: "Nicholas Piggin" To: =?utf-8?q?C=C3=A9dric_Le_Goater?= , X-Mailer: aerc 0.14.0 References: <20230531012313.19891-1-npiggin@gmail.com> <20230531012313.19891-3-npiggin@gmail.com> In-Reply-To: Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=npiggin@gmail.com; helo=mail-pg1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed May 31, 2023 at 5:25 PM AEST, C=C3=A9dric Le Goater wrote: > On 5/31/23 03:23, Nicholas Piggin wrote: > > SMT TCG emulation needs to be able to iterate over siblings in a core, > > and needs to serialise core access to shared SPRs and state. > >=20 > > Signed-off-by: Nicholas Piggin > > --- > > target/ppc/cpu.h | 9 +++++++++ > > target/ppc/cpu_init.c | 5 +++++ > > target/ppc/translate.c | 20 ++++++++++++++++++++ > > 3 files changed, 34 insertions(+) > >=20 > > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > > index 1f23b81e90..b594408a8d 100644 > > --- a/target/ppc/cpu.h > > +++ b/target/ppc/cpu.h > > @@ -672,6 +672,8 @@ enum { > > POWERPC_FLAG_TM =3D 0x00100000, > > /* Has SCV (ISA 3.00) = */ > > POWERPC_FLAG_SCV =3D 0x00200000, > > + /* Has >1 thread per core = */ > > + POWERPC_FLAG_SMT =3D 0x00400000, > > }; > > =20 > > /* > > @@ -1266,6 +1268,13 @@ struct CPUArchState { > > uint64_t pmu_base_time; > > }; > > =20 > > +#define _CORE_ID(cs) \ > > + (POWERPC_CPU(cs)->env.spr_cb[SPR_PIR].default_value & ~(cs->nr_thr= eads - 1)) > > + > > +#define THREAD_SIBLING_FOREACH(cs, cs_sibling) \ > > + CPU_FOREACH(cs_sibling) \ > > + if (_CORE_ID(cs) =3D=3D _CORE_ID(cs_sibling)) > > + > > > May be introduce these helpers when needed (and if needed). Yeah that's a good idea, I tried to structure it so you could see the main components first, but for a real patch it might indeed be better add them as needed. Thanks, Nick