From: "Nicholas Piggin" <npiggin@gmail.com>
To: "Timothy Pearson" <tpearson@raptorengineering.com>,
"Linuxppc-dev"
<linuxppc-dev-bounces+tpearson=raptorengineering.com@lists.ozlabs.org>,
"Jens Axboe" <axboe@kernel.dk>,
"regressions" <regressions@lists.linux.dev>, <mpe@ellerman.id.au>,
<christophe.leroy@csgroup.eu>
Subject: Re: [PATCH] powerpc: Fix data corruption on IPI
Date: Wed, 15 Nov 2023 11:35:35 +1000 [thread overview]
Message-ID: <CWYZVPYRFEW1.D62Z6KT8P5T@wheely> (raw)
In-Reply-To: <19221908.47168775.1699937769845.JavaMail.zimbra@raptorengineeringinc.com>
On Tue Nov 14, 2023 at 2:56 PM AEST, Timothy Pearson wrote:
> From 0b2678b7cdada1a3d9aec8626f31a988d81373fa Mon Sep 17 00:00:00 2001
> From: Timothy Pearson <tpearson@raptorengineering.com>
> Date: Mon, 13 Nov 2023 22:42:58 -0600
> Subject: [PATCH] powerpc: Fix data corruption on IPI
>
> On multithreaded SMP workloads such as those using io_uring, it is possible for
> multiple threads to hold an inconsistent view of system memory when an IPI is
> issued. This in turn leads to userspace memory corruption with varying degrees
> of probability based on workload and inter-thread timing.
>
> io_uring provokes this bug by its use of TWA_SIGNAL during thread creation,
> which is especially noticeable as significant userspace data corruption with
> certain workloads such as MariaDB (bug MDEV-30728). While using
> TWA_SIGNAL_NO_IPI works around the corruption, no other architecture requires
> this workaround.
>
> Issue an lwsync barrier instruction prior to sending the IPI. This ensures
> the receiving CPU has a consistent view of system memory, in line with other
> architectures.
>
> Tested under QEMU in kvm mode, running on a Talos II workstation with dual
> POWER9 DD2.2 CPUs.
>
> Tested-by: Timothy Pearson <tpearson@raptorengineering.com>
> Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
> ---
> arch/powerpc/kernel/smp.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
> index ab691c89d787..ba42238de518 100644
> --- a/arch/powerpc/kernel/smp.c
> +++ b/arch/powerpc/kernel/smp.c
> @@ -369,8 +369,10 @@ static inline void do_message_pass(int cpu, int msg)
>
> void arch_smp_send_reschedule(int cpu)
> {
> - if (likely(smp_ops))
> + if (likely(smp_ops)) {
> + __smp_lwsync();
> do_message_pass(cpu, PPC_MSG_RESCHEDULE);
> + }
> }
do_message_pass() on powernv and pseries is
smp_muxed_ipi_message_pass(), and the first thing that
ends up doing is the smp_mb() in smp_muxed_ipi_set_message()
AFAIKS, which is a hwsync, which is a stronger barrier than
lwsync. So I can't see what this really fixes.
Thanks,
Nick
next prev parent reply other threads:[~2023-11-15 1:35 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-14 4:56 [PATCH] powerpc: Fix data corruption on IPI Timothy Pearson
2023-11-14 7:59 ` Salvatore Bonaccorso
2023-11-14 8:03 ` Timothy Pearson
2023-11-14 8:03 ` Timothy Pearson
2023-11-15 1:35 ` Nicholas Piggin [this message]
-- strict thread matches above, loose matches on Subject: below --
2023-11-14 8:00 Timothy Pearson
2023-11-14 12:14 ` Michael Ellerman
2023-11-14 21:32 ` Timothy Pearson
2023-11-15 3:11 ` Nicholas Piggin
2023-11-17 7:39 ` Timothy Pearson
2023-11-17 7:52 ` Timothy Pearson
2023-11-17 8:01 ` Nicholas Piggin
2023-11-17 8:20 ` Timothy Pearson
2023-11-17 8:26 ` Timothy Pearson
2023-11-17 8:54 ` Timothy Pearson
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