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Tue, 12 Mar 2024 05:29:12 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 12 Mar 2024 22:29:07 +1000 Message-Id: Cc: "Daniel Henrique Barboza" , Subject: Re: [PATCH v7 03/10] target/ppc: Add gen_exception_err_nip() function From: "Nicholas Piggin" To: "BALATON Zoltan" , , X-Mailer: aerc 0.15.2 References: In-Reply-To: Received-SPF: pass client-ip=2607:f8b0:4864:20::12e; envelope-from=npiggin@gmail.com; helo=mail-il1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed Feb 28, 2024 at 1:08 AM AEST, BALATON Zoltan wrote: > Add gen_exception_err_nip() that does the same as gen_exception_err() > but takes the nip as a parameter to allow specifying it instead of > using the current instruction address then change gen_exception_err() > to use it. > > The gen_exception() and gen_exception_nip() functions are similar so > remove code duplication from those too while at it. > > Suggested-by: Nicholas Piggin > Signed-off-by: BALATON Zoltan Thanks for doing this one Reviewed-by: Nicholas Piggin > --- > target/ppc/translate.c | 28 +++++++++++++++------------- > 1 file changed, 15 insertions(+), 13 deletions(-) > > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index 28fc7791af..d87aae0cc4 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -296,33 +296,26 @@ static inline void gen_update_nip(DisasContext *ctx= , target_ulong nip) > tcg_gen_movi_tl(cpu_nip, nip); > } > =20 > -static void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t= error) > +static void gen_exception_err_nip(DisasContext *ctx, uint32_t excp, > + uint32_t error, target_ulong nip) > { > TCGv_i32 t0, t1; > =20 > - /* > - * These are all synchronous exceptions, we set the PC back to the > - * faulting instruction > - */ > - gen_update_nip(ctx, ctx->cia); > + gen_update_nip(ctx, nip); > t0 =3D tcg_constant_i32(excp); > t1 =3D tcg_constant_i32(error); > gen_helper_raise_exception_err(tcg_env, t0, t1); > ctx->base.is_jmp =3D DISAS_NORETURN; > } > =20 > -static void gen_exception(DisasContext *ctx, uint32_t excp) > +static inline void gen_exception_err(DisasContext *ctx, uint32_t excp, > + uint32_t error) > { > - TCGv_i32 t0; > - > /* > * These are all synchronous exceptions, we set the PC back to the > * faulting instruction > */ > - gen_update_nip(ctx, ctx->cia); > - t0 =3D tcg_constant_i32(excp); > - gen_helper_raise_exception(tcg_env, t0); > - ctx->base.is_jmp =3D DISAS_NORETURN; > + gen_exception_err_nip(ctx, excp, error, ctx->cia); > } > =20 > static void gen_exception_nip(DisasContext *ctx, uint32_t excp, > @@ -336,6 +329,15 @@ static void gen_exception_nip(DisasContext *ctx, uin= t32_t excp, > ctx->base.is_jmp =3D DISAS_NORETURN; > } > =20 > +static inline void gen_exception(DisasContext *ctx, uint32_t excp) > +{ > + /* > + * These are all synchronous exceptions, we set the PC back to the > + * faulting instruction > + */ > + gen_exception_nip(ctx, excp, ctx->cia); > +} > + > #if !defined(CONFIG_USER_ONLY) > static void gen_ppc_maybe_interrupt(DisasContext *ctx) > {