From: Vick, Matthew <matthew.vick@intel.com>
To: intel-wired-lan@osuosl.org
Subject: [Intel-wired-lan] [PATCH] fm10k: Update ITR scaling mechanism based on PCIe link speed
Date: Fri, 1 May 2015 18:17:02 +0000 [thread overview]
Message-ID: <D16910EA.761A6%matthew.vick@intel.com> (raw)
In-Reply-To: <1430427126.25212.6.camel@intel.com>
On 4/30/15, 1:52 PM, "Keller, Jacob E" <jacob.e.keller@intel.com> wrote:
>On Wed, 2015-04-29 at 19:20 -0700, Alexander Duyck wrote:
>>
>> Also I don't think I see any of the changes I suggested. It seems like
>> this could still divide the interrupt throttle rate all the way down to
>>0.
>
>I'm going to defer this for a bit then, since it depends on other
>changes I wasn't aware of.. Matthew?
>
>Regards,
>Jake
Yes, we should definitely defer this for a bit.
Sorry Alex, bit of a misfire on this one. I still plan to incorporate the
changes you proposed.
Cheers,
Matthew
next prev parent reply other threads:[~2015-05-01 18:17 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-30 0:10 [Intel-wired-lan] [PATCH] fm10k: Update ITR scaling mechanism based on PCIe link speed Jacob Keller
2015-04-30 2:20 ` Alexander Duyck
2015-04-30 20:52 ` Keller, Jacob E
2015-05-01 18:17 ` Vick, Matthew [this message]
2015-04-30 12:07 ` Jeff Kirsher
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