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From: "Alejandro Vallejo" <alejandro.vallejo@cloud.com>
To: "Jan Beulich" <jbeulich@suse.com>
Cc: "Anthony PERARD" <anthony.perard@vates.tech>,
	"Juergen Gross" <jgross@suse.com>,
	Xen-devel <xen-devel@lists.xenproject.org>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [PATCH v4 06/10] tools/libguest: Make setting MTRR registers unconditional
Date: Thu, 27 Jun 2024 13:02:37 +0100	[thread overview]
Message-ID: <D2AS8XQPR3TS.TDT0A6SPW47G@cloud.com> (raw)
In-Reply-To: <fe255839-f8ab-4dd1-abe8-8ec834099a8d@suse.com>

On Thu Jun 27, 2024 at 10:42 AM BST, Jan Beulich wrote:
> On 26.06.2024 18:28, Alejandro Vallejo wrote:
> > This greatly simplifies a later patch that makes use of HVM contexts to upload
> > LAPIC data. The idea is to reuse MTRR setting procedure to avoid code
> > duplication. It's currently only used for PVH, but there's no real reason to
> > overcomplicate the toolstack preventing them being set for HVM too when
> > hvmloader will override them anyway.
>
> Yet then - why set them when hvmloader will do so again?

To keep the toolstack complexity tractable, essentially. This way I can send N
hypercalls (for N vCPUs) rather than 2*N and have a single hvmcontext struct
rather than several.

In truth though, I could simply write back the old MTRRs taken from bsp_ctx on
HVM.

> Is it even guaranteed
> to be no change in (guest) behavior to do so?

hvmloader overrides those values, so there is no change by the time BIOS or OVMF
start running. As I mentioned before though, I can actually upload back the old
values in the HVM case.

>
> Plus what about a guest which was configured to have the CPUID bit for MTRRs
> clear?
> I think we ought to document this as not supported for PVH (we may

By "this" do you mean PVH _must_ have MTRR support? I would agree.

> actually choose to refuse building such a guest), but in principle the MTRR
> save/load operations should simply fail for a HVM guest in said configuration.

What use cases does that cover? With the adjustment I mention at the top that
should be sorted. I'm wondering why we allow !mtrr at all.

> Making such a change in Xen now would, afaict, be benign to the tool stack.
> After this adjustment it would result in a perceived regression, when there
> shouldn't be any.

Fair point.

>
> Thinking about it, even for PVH it may make sense to allow CPUID.MTRR=0, as
> long as CPUID.PAT=1, thus forcing it into PAT-only mode. I think we did even
> discuss this possible configuration before.
>
> Jan

Is PAT-only an existing real HW configuration? Can't say I've seen any.

Cheers,
Alejandro



  reply	other threads:[~2024-06-27 12:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-26 16:28 [PATCH for-4.19 v4 00/10] x86: Expose consistent topology to guests Alejandro Vallejo
2024-06-26 16:28 ` [PATCH for 4.19 v4 01/10] tools/hvmloader: Fix non-deterministic cpuid() Alejandro Vallejo
2024-06-26 16:43   ` Andrew Cooper
2024-06-26 16:52     ` Alejandro Vallejo
2024-06-27  9:48     ` oleksii.kurochko
2024-06-26 16:28 ` [PATCH for 4.19 v4 02/10] x86/vlapic: Move lapic migration checks to the check hooks Alejandro Vallejo
2024-06-26 16:28 ` [PATCH for-4.19 v4 03/10] xen/x86: Add initial x2APIC ID to the per-vLAPIC save area Alejandro Vallejo
2024-06-26 16:28 ` [PATCH v4 04/10] tools/hvmloader: Retrieve (x2)APIC IDs from the APs themselves Alejandro Vallejo
2024-06-26 16:28 ` [PATCH v4 05/10] xen/x86: Add supporting code for uploading LAPIC contexts during domain create Alejandro Vallejo
2024-06-26 16:28 ` [PATCH v4 06/10] tools/libguest: Make setting MTRR registers unconditional Alejandro Vallejo
2024-06-27  9:42   ` Jan Beulich
2024-06-27 12:02     ` Alejandro Vallejo [this message]
2024-06-27 14:53       ` Jan Beulich
2024-06-26 16:28 ` [PATCH v4 07/10] xen/lib: Add topology generator for x86 Alejandro Vallejo
2024-06-26 16:28 ` [PATCH v4 08/10] xen/x86: Derive topologically correct x2APIC IDs from the policy Alejandro Vallejo
2024-06-26 16:28 ` [PATCH v4 09/10] xen/x86: Synthesise domain topologies Alejandro Vallejo
2024-06-26 16:28 ` [PATCH v4 10/10] tools/libguest: Set topologically correct x2APIC IDs for each vCPU Alejandro Vallejo

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