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Fri, 27 Sep 2024 06:42:00 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Fri, 27 Sep 2024 14:41:59 +0100 Message-Id: Cc: "Xen-devel" , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH v2] x86/traps: Re-enable interrupts after reading cr2 in the #PF handler From: "Alejandro Vallejo" To: "Andrew Cooper" , "Jan Beulich" X-Mailer: aerc 0.18.2 References: <20240918130554.97345-1-alejandro.vallejo@cloud.com> <4fbfcaf2-f317-4b4f-9655-0f0c9e1e453b@suse.com> <30c4303c-81a3-4507-80b5-08b1dbda6104@citrix.com> In-Reply-To: <30c4303c-81a3-4507-80b5-08b1dbda6104@citrix.com> Hi, On Tue Sep 24, 2024 at 7:36 PM BST, Andrew Cooper wrote: > On 23/09/2024 2:03 pm, Jan Beulich wrote: > > On 23.09.2024 12:14, Alejandro Vallejo wrote: > >> On Fri Sep 20, 2024 at 3:12 PM BST, Roger Pau Monn=C3=A9 wrote: > >>> On Wed, Sep 18, 2024 at 02:05:54PM +0100, Alejandro Vallejo wrote: > >>>> Moves sti directly after the cr2 read and immediately after the #PF > >>>> handler. > >>> I think you need to add some context about why this is needed, iow: > >>> avoid corrupting %cr2 if a nested 3PF happens. > >> I can send a v3 with: > >> > >> ``` > >> Hitting a page fault clobbers %cr2, so if a page fault is handled wh= ile > >> handling a previous page fault then %cr2 will hold the address of th= e latter > >> fault rather than the former. This patch makes the page fault path d= elay > >> re-enabling IRQs until %cr2 has been read in order to ensure it stay= s > >> consistent. > > And under what conditions would we experience #PF while already process= ing > > an earlier #PF? If an interrupt kicks in, that's not supposed to by rai= sing > > any #PF itself. Which isn't to say that the change isn't worthwhile to = make, > > but it would be nice if it was explicit whether there are active issues= , or > > whether this is merely to be on the safe side going forward. > > My understanding is that this came from code inspection, not an active > issue. That's right. I merely eyeballed it while going through the interrupt dispa= tch sequence. This is not a bugfix as much as simply being cautious. > > The same is true for %dr6 and #DB, and MSR_XFD_ERR and #NM. > > I think we can safely agree to veto the use of AMX in the #NM handler, Agree. > and IST exceptions don't re-enable interrupts[1], so #PF is the only > problem case. > > Debug keys happen off the back of plain IRQs, and we can get #PF when Could you elaborate here on debug keys? Not sure I understand what you mean= . > interrogating guest stacks.=C2=A0 Also, I'm far from certain we're safe t= o > spurious #PF's from updating Xen mappings, so I think there are a bunch > of risky corner cases that we might be exposed to. > > And I really need to find some time to get FRED working... > > ~Andrew > > [1] We do re-enable interrupts in order to IPI cpu0 for "clean" > shutdown, and this explodes in our faces if kexec isn't active and we > crashed in the middle of context switch.=C2=A0 We really need to not need > irqs-on in order to shut down. Why do we need them currently in that path? Regardless, shutdowns would be = the response to aborts (#MC or #DF) rather than #DB, right? Cheers, Alejandro