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X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250429_092136_416512_977A4271 X-CRM114-Status: GOOD ( 31.99 ) X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+kvm-riscv=archiver.kernel.org@lists.infradead.org MjAyNS0wNC0yOVQyMDozMToxOCswNTozMCwgQW51cCBQYXRlbCA8YW51cEBicmFpbmZhdWx0Lm9y Zz46Cj4gT24gVHVlLCBBcHIgMjksIDIwMjUgYXQgMzo1NeKAr1BNIFJhZGltIEtyxI1tw6HFmSA8 cmtyY21hckB2ZW50YW5hbWljcm8uY29tPiB3cm90ZToKPj4KPj4gMjAyNS0wNC0yOVQxMToyNToz NSswNTozMCwgQW51cCBQYXRlbCA8YXBhdGVsQHZlbnRhbmFtaWNyby5jb20+Ogo+PiA+IE9uIE1v biwgQXByIDI4LCAyMDI1IGF0IDExOjE14oCvUE0gUmFkaW0gS3LEjW3DocWZIDxya3JjbWFyQHZl bnRhbmFtaWNyby5jb20+IHdyb3RlOgo+PiA+Pgo+PiA+PiAyMDI1LTA0LTI4VDE3OjUyOjI1KzA1 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List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 29 Apr 2025 18:21:33 +0200 Message-Id: From: =?utf-8?q?Radim_Kr=C4=8Dm=C3=A1=C5=99?= Subject: Re: [PATCH 4/5] KVM: RISC-V: reset VCPU state when becoming runnable Cc: "Anup Patel" , , , , , "Atish Patra" , "Paul Walmsley" , "Palmer Dabbelt" , "Albert Ou" , "Alexandre Ghiti" , "Andrew Jones" , "Mayuresh Chitale" To: "Anup Patel" References: <20250403112522.1566629-3-rkrcmar@ventanamicro.com> <20250403112522.1566629-7-rkrcmar@ventanamicro.com> In-Reply-To: 2025-04-29T20:31:18+05:30, Anup Patel : > On Tue, Apr 29, 2025 at 3:55=E2=80=AFPM Radim Kr=C4=8Dm=C3=A1=C5=99 wrote: >> >> 2025-04-29T11:25:35+05:30, Anup Patel : >> > On Mon, Apr 28, 2025 at 11:15=E2=80=AFPM Radim Kr=C4=8Dm=C3=A1=C5=99 <= rkrcmar@ventanamicro.com> wrote: >> >> >> >> 2025-04-28T17:52:25+05:30, Anup Patel : >> >> > On Thu, Apr 3, 2025 at 5:02=E2=80=AFPM Radim Kr=C4=8Dm=C3=A1=C5=99 = wrote: >> >> >> For a cleaner solution, we should add interfaces to perform the KV= M-SBI >> >> >> reset request on userspace demand. I think it would also be much = better >> >> >> if userspace was in control of the post-reset state. >> >> > >> >> > Apart from breaking KVM user-space, this patch is incorrect and >> >> > does not align with the: >> >> > 1) SBI spec >> >> > 2) OS boot protocol. >> >> > >> >> > The SBI spec only defines the entry state of certain CPU registers >> >> > (namely, PC, A0, and A1) when CPU enters S-mode: >> >> > 1) Upon SBI HSM start call from some other CPU >> >> > 2) Upon resuming from non-retentive SBI HSM suspend or >> >> > SBI system suspend >> >> > >> >> > The S-mode entry state of the boot CPU is defined by the >> >> > OS boot protocol and not by the SBI spec. Due to this, reason >> >> > KVM RISC-V expects user-space to set up the S-mode entry >> >> > state of the boot CPU upon system reset. >> >> >> >> We can handle the initial state consistency in other patches. >> >> What needs addressing is a way to trigger the KVM reset from userspac= e, >> >> even if only to clear the internal KVM state. >> >> >> >> I think mp_state is currently the best signalization that KVM should >> >> reset, so I added it there. >> >> >> >> What would be your preferred interface for that? >> >> >> > >> > Instead of creating a new interface, I would prefer that VCPU >> > which initiates SBI System Reset should be resetted immediately >> > in-kernel space before forwarding the system reset request to >> > user space. >> >> The initiating VCPU might not be the boot VCPU. >> It would be safer to reset all of them. > > I meant initiating VCPU and not the boot VCPU. Currently, the > non-initiating VCPUs are already resetted by VCPU requests > so nothing special needs to be done. Currently, we make the request only for VCPUs brought up by HSM -- the non-boot VCPUs. There is a single VCPU not being reset and resetting the reset initiating VCPU changes nothing. e.g. 1) VCPU 1 initiates the reset through an ecall. 2) All VCPUs are stopped and return to userspace. 3) Userspace prepares VCPU 0 as the boot VCPU. 4) VCPU 0 executes without going through KVM reset paths. The point of this patch is to reset the boot VCPU, so we reset the VCPU that is made runnable by the KVM_SET_MP_STATE IOCTL. For design alternatives, it is also possible to reset immediately in an IOCTL instead of making the reset request. >> You also previously mentioned that we need to preserve the pre-reset >> state for userspace, which I completely agree with and it is why the >> reset happens later. > > Yes, that was only for debug purposes from user space. At the > moment, there is no one using this for debug purposes so we > can sacrifice that. We still can't immediately reset the boot VCPU, because it might already be in userspace. We don't really benefit from immediately resetting the initiating VCPU. Also, making the reset request for all VCPUs from the initiating VCPU has some undesirable race conditions we would have to prevent, so I do prefer we go the IOCTL reset way. >> > This way we also force KVM user-space to explicitly >> > set the PC, A0, and A1 before running the VCPU again after >> > system reset. >> >> We also want to consider reset from emulation outside of KVM. >> >> There is a "simple" solution that covers everything (except speed) -- >> the userspace can tear down the whole VM and re-create it. >> Do we want to do this instead and drop all resets from KVM? > > I think we should keep the VCPU resets in KVM so that handling > of system reset handling in user space remains simple. The user > space can also re-create the VM upon system reset but that is > user space choice. Ok. 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X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250429_092136_266539_C17A728B X-CRM114-Status: GOOD ( 31.99 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org MjAyNS0wNC0yOVQyMDozMToxOCswNTozMCwgQW51cCBQYXRlbCA8YW51cEBicmFpbmZhdWx0Lm9y Zz46Cj4gT24gVHVlLCBBcHIgMjksIDIwMjUgYXQgMzo1NeKAr1BNIFJhZGltIEtyxI1tw6HFmSA8 cmtyY21hckB2ZW50YW5hbWljcm8uY29tPiB3cm90ZToKPj4KPj4gMjAyNS0wNC0yOVQxMToyNToz NSswNTozMCwgQW51cCBQYXRlbCA8YXBhdGVsQHZlbnRhbmFtaWNyby5jb20+Ogo+PiA+IE9uIE1v biwgQXByIDI4LCAyMDI1IGF0IDExOjE14oCvUE0gUmFkaW0gS3LEjW3DocWZIDxya3JjbWFyQHZl bnRhbmFtaWNyby5jb20+IHdyb3RlOgo+PiA+Pgo+PiA+PiAyMDI1LTA0LTI4VDE3OjUyOjI1KzA1 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