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Sun, 04 May 2025 23:48:58 -0700 (PDT) Received: from localhost ([1.146.78.151]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22e150eb089sm47463395ad.20.2025.05.04.23.48.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 04 May 2025 23:48:57 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 05 May 2025 16:48:50 +1000 Message-Id: Subject: Re: [PATCH v3 10/12] net/e1000e|igb: Only send delayed msix interrupts that have a cause From: "Nicholas Piggin" To: "Akihiko Odaki" Cc: , "Dmitry Fleytman" , "Jason Wang" , "Sriram Yagnaraman" , "Fabiano Rosas" , "Laurent Vivier" , "Paolo Bonzini" X-Mailer: aerc 0.19.0 References: <20250502031705.100768-1-npiggin@gmail.com> <20250502031705.100768-11-npiggin@gmail.com> <0ff9c661-bb52-4a07-924b-96fb57ecda81@daynix.com> In-Reply-To: <0ff9c661-bb52-4a07-924b-96fb57ecda81@daynix.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=npiggin@gmail.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon May 5, 2025 at 3:51 PM AEST, Akihiko Odaki wrote: > On 2025/05/02 12:17, Nicholas Piggin wrote: >> The msix interrupt throttling timer expiry sends an interrupt even if >> there is no unmasked interrupt causes. This can be observed by seeing >> two interrupts in response to a single event when throttling is active. >>=20 >> The e1000e non-msix paths seem to get this right by masking and testing >> ICR and IMS. Add similar checks for the msix cases in e1000e and igb. >>=20 >> Signed-off-by: Nicholas Piggin >> --- >> hw/net/e1000e_core.c | 10 ++++++---- >> hw/net/igb_core.c | 11 ++++++++--- >> 2 files changed, 14 insertions(+), 7 deletions(-) >>=20 >> diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c >> index 022884a2ea0..d53f70065ef 100644 >> --- a/hw/net/e1000e_core.c >> +++ b/hw/net/e1000e_core.c >> @@ -230,10 +230,12 @@ e1000e_intrmgr_on_msix_throttling_timer(void *opaq= ue) >> =20 >> timer->running =3D false; >> =20 >> - causes =3D find_msix_causes(core, idx); >> - trace_e1000e_irq_msix_notify_postponed_vec(idx); >> - msix_notify(core->owner, idx); >> - e1000e_msix_auto_clear_mask(core, causes); >> + causes =3D find_msix_causes(core, idx) & core->mac[IMS] & core->mac= [ICR]; >> + if (causes) { >> + trace_e1000e_irq_msix_notify_postponed_vec(idx); >> + msix_notify(core->owner, causes); > > I think this should be: msix_notify(core->owner, idx); Yes good catch, it was fixed in the next patch but it's a but from splitting. Thank you. Thanks, Nick