All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Théo Lebrun" <theo.lebrun@bootlin.com>
To: "Santhosh Kumar K" <s-k6@ti.com>, <miquel.raynal@bootlin.com>,
	<broonie@kernel.org>, <vigneshr@ti.com>, <marex@denx.de>,
	<computersforpeace@gmail.com>, <grmoore@opensource.altera.com>
Cc: <linux-spi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<praneeth@ti.com>, <p-mantena@ti.com>, <a-dutta@ti.com>,
	<u-kumar1@ti.com>
Subject: Re: [PATCH 3/4] spi: cadence-quadspi: Fix cqspi_setup_flash()
Date: Thu, 04 Sep 2025 17:32:25 +0200	[thread overview]
Message-ID: <DCK4I00CCR4R.2K7P9IEDI0OA2@bootlin.com> (raw)
In-Reply-To: <20250904133130.3105736-4-s-k6@ti.com>

Hello Santhosh,

On Thu Sep 4, 2025 at 3:31 PM CEST, Santhosh Kumar K wrote:
> The 'max_cs' stores the largest chip select number. It should only
> be updated when the current 'cs' is greater than existing 'max_cs'. So,
> fix the condition accordingly.

Good catch. Current code can only work with one chip-select.

Reviewed-by: Théo Lebrun <theo.lebrun@bootlin.com>

Maybe we should error out if we don't enter the loop, ie if we have no
flash declared?
 - Before your patch, cqspi->num_chipselect was set to num-cs DT prop or
   CQSPI_MAX_CHIPSELECT as fallback.
 - After your patch, cqspi->num_chipselect is set to one.

In neither case do we get an error if no flash is defined in DT.

We could either return some error code or set cqspi->num_chipselect=0
which will lead to spi_register_controller() to fail [0].

[0]: https://elixir.bootlin.com/linux/v6.16.4/source/drivers/spi/spi.c#L3322-L3329

Thanks,

--
Théo Lebrun, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com


  parent reply	other threads:[~2025-09-04 15:32 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-04 13:31 [PATCH 0/4] Miscellaneous fixes and clean-ups Santhosh Kumar K
2025-09-04 13:31 ` [PATCH 1/4] spi: cadence-quadspi: Flush posted register writes before INDAC access Santhosh Kumar K
2025-09-04 14:35   ` Pratyush Yadav
2025-09-04 13:31 ` [PATCH 2/4] spi: cadence-quadspi: Flush posted register writes before DAC access Santhosh Kumar K
2025-09-04 14:36   ` Pratyush Yadav
2025-09-04 13:31 ` [PATCH 3/4] spi: cadence-quadspi: Fix cqspi_setup_flash() Santhosh Kumar K
2025-09-04 14:41   ` Pratyush Yadav
2025-09-05 11:04     ` Santhosh Kumar K
2025-09-04 15:32   ` Théo Lebrun [this message]
2025-09-05 11:04     ` Santhosh Kumar K
2025-09-04 13:31 ` [PATCH 4/4] spi: cadence-quadspi: Use BIT() macros where possible Santhosh Kumar K
2025-09-04 14:49   ` Pratyush Yadav
2025-09-05 11:04     ` Santhosh Kumar K

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=DCK4I00CCR4R.2K7P9IEDI0OA2@bootlin.com \
    --to=theo.lebrun@bootlin.com \
    --cc=a-dutta@ti.com \
    --cc=broonie@kernel.org \
    --cc=computersforpeace@gmail.com \
    --cc=grmoore@opensource.altera.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=marex@denx.de \
    --cc=miquel.raynal@bootlin.com \
    --cc=p-mantena@ti.com \
    --cc=praneeth@ti.com \
    --cc=s-k6@ti.com \
    --cc=u-kumar1@ti.com \
    --cc=vigneshr@ti.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.