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Mon, 29 Sep 2025 10:38:03 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200::bfbb]) by smtp.gmail.com with UTF8SMTPSA id 5b1f17b1804b1-46e56f64d06sm21182395e9.12.2025.09.29.10.38.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Sep 2025 10:38:03 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 29 Sep 2025 19:36:58 +0200 Message-Id: Subject: Re: [PATCH v9 1/2] Set KVM initial privilege mode and mp_state Cc: , , , , , , , , To: "Alistair Francis" , "Xie Bo" From: =?utf-8?q?Radim_Kr=C4=8Dm=C3=A1=C5=99?= References: <20250915070811.3422578-1-xb@ultrarisc.com> <20250915070811.3422578-2-xb@ultrarisc.com> In-Reply-To: Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=rkrcmar@ventanamicro.com; helo=mail-wr1-x435.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org 2025-09-29T11:48:08+10:00, Alistair Francis : > On Mon, Sep 15, 2025 at 5:08=E2=80=AFPM Xie Bo wrote: >> >> For KVM mode, the privilege mode should not include M-mode, and the >> initial value should be set to S-mode. Additionally, a following patch >> adds the implementation of putting the vCPU privilege mode to KVM. >> When the vCPU runs for the first time, QEMU will first put the privilege >> state to KVM. If the initial value is set to M-mode, KVM will encounter >> an error. >> >> In addition, this patch introduces the 'mp_state' field to RISC-V >> vCPUs, following the convention used by KVM on x86. The 'mp_state' >> reflects the multiprocessor state of a vCPU, and is used to control >> whether the vCPU is runnable by KVM. Randomly select one CPU as the >> boot CPU. Since each CPU executes the riscv_cpu_reset_hold() function >> and CPU0 executes first, only CPU0 randomly selects the boot CPU. >> >> Signed-off-by: Xie Bo >> --- >> target/riscv/cpu.c | 17 ++++++++++++++++- >> target/riscv/cpu.h | 2 ++ >> 2 files changed, 18 insertions(+), 1 deletion(-) > > This fails to build with the following error, it seems an include is miss= ing > > ../target/riscv/cpu.c: In function =E2=80=98riscv_cpu_reset_hold=E2=80=99= : > ../target/riscv/cpu.c:711:25: error: =E2=80=98KVM_MP_STATE_RUNNABLE=E2=80= =99 > undeclared (first use in this function) > 711 | env->mp_state =3D KVM_MP_STATE_RUNNABLE; > | ^~~~~~~~~~~~~~~~~~~~~ > ../target/riscv/cpu.c:711:25: note: each undeclared identifier is > reported only once for each function it appears in > ../target/riscv/cpu.c:713:25: error: =E2=80=98KVM_MP_STATE_STOPPED=E2=80= =99 undeclared > (first use in this function); did you mean =E2=80=98S390_CPU_STATE_STOPPE= D=E2=80=99? > 713 | env->mp_state =3D KVM_MP_STATE_STOPPED; > | ^~~~~~~~~~~~~~~~~~~~ > | S390_CPU_STATE_STO I think this is because the code belongs in kvm_riscv_reset_vcpu(). >> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c >> + static int boot_cpu_index; >> + MachineState *ms =3D MACHINE(qdev_get_machine()); >> + if (cs->cpu_index =3D=3D 0) { >> + boot_cpu_index =3D g_random_int_range(0, ms->smp.cpus); >> + } If we're already touching the code, can we also express boot_cpu_index in a VM state? Using a static variable is pretty scary. Thanks.