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Date: Tue, 30 Sep 2025 17:08:50 +0200
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Cc: <linux-kernel@vger.kernel.org>, <rust-for-linux@vger.kernel.org>,
 <dri-devel@lists.freedesktop.org>, <acourbot@nvidia.com>, "Alistair Popple"
 <apopple@nvidia.com>, "Miguel Ojeda" <ojeda@kernel.org>, "Alex Gaynor"
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 Lankhorst" <maarten.lankhorst@linux.intel.com>, "Maxime Ripard"
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 Hubbard" <jhubbard@nvidia.com>, "Timur Tabi" <ttabi@nvidia.com>,
 <joel@joelfernandes.org>, "Elle Rhumsaa" <elle@weathered-steel.dev>, "Yury
 Norov" <yury.norov@gmail.com>, "Daniel Almeida"
 <daniel.almeida@collabora.com>, "Andrea Righi" <arighi@nvidia.com>,
 <nouveau@lists.freedesktop.org>
To: "Joel Fernandes" <joelagnelf@nvidia.com>
From: "Danilo Krummrich" <dakr@kernel.org>
Subject: Re: [PATCH v5 0/9] Introduce bitfield and move register macro to
 rust/kernel/
References: <20250930144537.3559207-1-joelagnelf@nvidia.com>
In-Reply-To: <20250930144537.3559207-1-joelagnelf@nvidia.com>
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On Tue Sep 30, 2025 at 4:45 PM CEST, Joel Fernandes wrote:
>  MAINTAINERS                                   |   7 +
>  drivers/gpu/nova-core/falcon.rs               |   2 +-
>  drivers/gpu/nova-core/falcon/gsp.rs           |   4 +-
>  drivers/gpu/nova-core/falcon/sec2.rs          |   2 +-
>  drivers/gpu/nova-core/regs.rs                 |   6 +-
>  rust/kernel/bitfield.rs                       | 804 ++++++++++++++++++
>  rust/kernel/io.rs                             |   1 +
>  .../macros.rs =3D> rust/kernel/io/register.rs   | 317 +------
>  rust/kernel/lib.rs                            |   1 +
>  security/Kconfig.hardening                    |   9 +
>  10 files changed, 870 insertions(+), 283 deletions(-)
>  create mode 100644 rust/kernel/bitfield.rs
>  rename drivers/gpu/nova-core/regs/macros.rs =3D> rust/kernel/io/register=
.rs (72%)

I think we have at least three or four potential target trees for this:
driver-core (I/O), drm-rust (Nova), bitmap / Rust.

(I don't know which tree the bitmap stuff would go through, I did not find =
a
tree entry in the MAINTAINERS file.)

Unless someone thinks otherwise, I'd take it through the drm-rust tree once=
 the
series is ready. This should cause the least conflicts and as a bonus enabl=
e Tyr
to use it right away.