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Tue, 28 Oct 2025 05:36:27 -0700 (PDT) Received: from localhost ([2a02:8308:a00c:e200::3052]) by smtp.gmail.com with UTF8SMTPSA id ffacd0b85a97d-429952e2e06sm20285678f8f.46.2025.10.28.05.36.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Oct 2025 05:36:26 -0700 (PDT) Mime-Version: 1.0 Date: Tue, 28 Oct 2025 13:36:20 +0100 Message-Id: From: =?utf-8?q?Radim_Kr=C4=8Dm=C3=A1=C5=99?= Subject: Re: [PATCH 3/3] riscv: crash: use NMI to stop the CPU Cc: , , , , , , , , , , , , , , , , , , "linux-riscv" To: "Conor Dooley" , "Yunhui Cui" References: <20251027133431.15321-1-cuiyunhui@bytedance.com> <20251027133431.15321-4-cuiyunhui@bytedance.com> <20251028-scallion-list-c8aa5f350286@spud> In-Reply-To: <20251028-scallion-list-c8aa5f350286@spud> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251028_053629_630143_A45BFE38 X-CRM114-Status: UNSURE ( 9.13 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org 2025-10-28T10:42:12+00:00, Conor Dooley : > On Mon, Oct 27, 2025 at 09:34:31PM +0800, Yunhui Cui wrote: >> NMI is more robust than IPI for stopping CPUs during crashes, >> especially with interrupts disabled. Add SBI_SSE_EVENT_LOCAL_CRASH_NMI >> eventid to implement NMI for stopping CPUs. >> >> Signed-off-by: Yunhui Cui >> --- >> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h >> @@ -487,6 +487,7 @@ enum sbi_sse_attr_id { >> #define SBI_SSE_EVENT_GLOBAL_LOW_PRIO_RAS 0x00108000 >> #define SBI_SSE_EVENT_LOCAL_SOFTWARE_INJECTED 0xffff0000 >> #define SBI_SSE_EVENT_LOCAL_UNKNOWN_NMI 0xffff0001 >> +#define SBI_SSE_EVENT_LOCAL_CRASH_NMI 0xffff0002 This event isn't defined in the SBI pull request. I assume it's a pure software event that the platform shouldn't inject. If we want to reserve more events for software use, why not make them generic, like SBI_SSE_EVENT_LOCAL_SOFTWARE_INJECTED? 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Tue, 28 Oct 2025 05:36:26 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 28 Oct 2025 13:36:20 +0100 Message-Id: From: =?utf-8?q?Radim_Kr=C4=8Dm=C3=A1=C5=99?= Subject: Re: [PATCH 3/3] riscv: crash: use NMI to stop the CPU Cc: , , , , , , , , , , , , , , , , , , "linux-riscv" To: "Conor Dooley" , "Yunhui Cui" References: <20251027133431.15321-1-cuiyunhui@bytedance.com> <20251027133431.15321-4-cuiyunhui@bytedance.com> <20251028-scallion-list-c8aa5f350286@spud> In-Reply-To: <20251028-scallion-list-c8aa5f350286@spud> 2025-10-28T10:42:12+00:00, Conor Dooley : > On Mon, Oct 27, 2025 at 09:34:31PM +0800, Yunhui Cui wrote: >> NMI is more robust than IPI for stopping CPUs during crashes, >> especially with interrupts disabled. Add SBI_SSE_EVENT_LOCAL_CRASH_NMI >> eventid to implement NMI for stopping CPUs. >>=20 >> Signed-off-by: Yunhui Cui >> --- >> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h >> @@ -487,6 +487,7 @@ enum sbi_sse_attr_id { >> #define SBI_SSE_EVENT_GLOBAL_LOW_PRIO_RAS 0x00108000 >> #define SBI_SSE_EVENT_LOCAL_SOFTWARE_INJECTED 0xffff0000 >> #define SBI_SSE_EVENT_LOCAL_UNKNOWN_NMI 0xffff0001 >> +#define SBI_SSE_EVENT_LOCAL_CRASH_NMI 0xffff0002 This event isn't defined in the SBI pull request. I assume it's a pure software event that the platform shouldn't inject. If we want to reserve more events for software use, why not make them generic, like SBI_SSE_EVENT_LOCAL_SOFTWARE_INJECTED? Thanks.