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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2025 15:33:57.5944 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 59d35ec3-5323-4bbc-5e48-08de30ef0b40 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BY1PEPF0001AE17.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6795 Hi, On Fri Nov 28, 2025 at 9:19 PM CET, Andrew Cooper wrote: > Everything here is really VMCB functionality, so merge it into vmcb.c. M= ove > the declarations from the global svmdebug.h to the logical vmcb.h. > > No functional change. Not functional, but there's a single instance of style adjustment on move..= . > > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monn=C3=A9 > --- > xen/arch/x86/hvm/svm/Makefile | 1 - > xen/arch/x86/hvm/svm/nestedsvm.c | 1 - > xen/arch/x86/hvm/svm/svmdebug.c | 181 -------------------- > xen/arch/x86/hvm/svm/vmcb.c | 159 +++++++++++++++++ > xen/arch/x86/hvm/svm/vmcb.h | 3 + > xen/arch/x86/include/asm/hvm/svm/svmdebug.h | 3 - > 6 files changed, 162 insertions(+), 186 deletions(-) > delete mode 100644 xen/arch/x86/hvm/svm/svmdebug.c > > diff --git a/xen/arch/x86/hvm/svm/Makefile b/xen/arch/x86/hvm/svm/Makefil= e > index 760d2954da83..8a072cafd572 100644 > --- a/xen/arch/x86/hvm/svm/Makefile > +++ b/xen/arch/x86/hvm/svm/Makefile > @@ -4,5 +4,4 @@ obj-bin-y +=3D entry.o > obj-y +=3D intr.o > obj-y +=3D nestedsvm.o > obj-y +=3D svm.o > -obj-y +=3D svmdebug.o > obj-y +=3D vmcb.o > diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nest= edsvm.c > index 191466755148..63ed6c86b775 100644 > --- a/xen/arch/x86/hvm/svm/nestedsvm.c > +++ b/xen/arch/x86/hvm/svm/nestedsvm.c > @@ -9,7 +9,6 @@ > #include > #include > #include > -#include > #include /* paging_mode_hap */ > #include /* for local_event_delivery_(en|dis)able */ > #include /* p2m_get_pagetable, p2m_get_nestedp2m */ > diff --git a/xen/arch/x86/hvm/svm/svmdebug.c b/xen/arch/x86/hvm/svm/svmde= bug.c > deleted file mode 100644 > index bdb9ea3583ee..000000000000 > --- a/xen/arch/x86/hvm/svm/svmdebug.c > +++ /dev/null > @@ -1,181 +0,0 @@ > -/* SPDX-License-Identifier: GPL-2.0-only */ > -/* > - * svmdebug.c: debug functions > - * Copyright (c) 2011, Advanced Micro Devices, Inc. > - * > - */ > - > -#include > -#include > -#include > -#include > - > -#include "vmcb.h" > - > -static void svm_dump_sel(const char *name, const struct segment_register= *s) > -{ > - printk("%s: %04x %04x %08x %016"PRIx64"\n", > - name, s->sel, s->attr, s->limit, s->base); > -} > - > -void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb) > -{ > - struct vcpu *curr =3D current; > - > - /* > - * If we are dumping the VMCB currently in context, some guest state= may > - * still be cached in hardware. Retrieve it. > - */ > - if ( vmcb =3D=3D curr->arch.hvm.svm.vmcb ) > - svm_sync_vmcb(curr, vmcb_in_sync); > - > - printk("Dumping guest's current state at %s...\n", from); > - printk("Size of VMCB =3D %zu, paddr =3D %"PRIpaddr", vaddr =3D %p\n"= , > - sizeof(struct vmcb_struct), virt_to_maddr(vmcb), vmcb); > - > - printk("cr_intercepts =3D %#x dr_intercepts =3D %#x " > - "exception_intercepts =3D %#x\n", > - vmcb_get_cr_intercepts(vmcb), vmcb_get_dr_intercepts(vmcb), > - vmcb_get_exception_intercepts(vmcb)); > - printk("general1_intercepts =3D %#x general2_intercepts =3D %#x\n", > - vmcb_get_general1_intercepts(vmcb), vmcb_get_general2_interce= pts(vmcb)); > - printk("iopm_base_pa =3D %#"PRIx64" msrpm_base_pa =3D %#"PRIx64" tsc= _offset =3D %#"PRIx64"\n", > - vmcb_get_iopm_base_pa(vmcb), vmcb_get_msrpm_base_pa(vmcb), > - vmcb_get_tsc_offset(vmcb)); > - printk("tlb_control =3D %#x vintr =3D %#"PRIx64" int_stat =3D %#"PRI= x64"\n", > - vmcb->tlb_control, vmcb_get_vintr(vmcb).bytes, > - vmcb->int_stat.raw); > - printk("event_inj %016"PRIx64", valid? %d, ec? %d, type %u, vector %= #x\n", > - vmcb->event_inj.raw, vmcb->event_inj.v, > - vmcb->event_inj.ev, vmcb->event_inj.type, > - vmcb->event_inj.vector); > - printk("exitcode =3D %#"PRIx64" exit_int_info =3D %#"PRIx64"\n", > - vmcb->exitcode, vmcb->exit_int_info.raw); > - printk("exitinfo1 =3D %#"PRIx64" exitinfo2 =3D %#"PRIx64"\n", > - vmcb->exitinfo1, vmcb->exitinfo2); > - printk("asid =3D %#x np_ctrl =3D %#"PRIx64":%s%s%s\n", > - vmcb_get_asid(vmcb), vmcb_get_np_ctrl(vmcb), > - vmcb_get_np(vmcb) ? " NP" : "", > - vmcb_get_sev(vmcb) ? " SEV" : "", > - vmcb_get_sev_es(vmcb) ? " SEV_ES" : ""); > - printk("virtual vmload/vmsave =3D %d, virt_ext =3D %#"PRIx64"\n", > - vmcb->virt_ext.fields.vloadsave_enable, vmcb->virt_ext.bytes)= ; > - printk("cpl =3D %d efer =3D %#"PRIx64" star =3D %#"PRIx64" lstar =3D= %#"PRIx64"\n", > - vmcb_get_cpl(vmcb), vmcb_get_efer(vmcb), vmcb->star, vmcb->ls= tar); > - printk("CR0 =3D 0x%016"PRIx64" CR2 =3D 0x%016"PRIx64"\n", > - vmcb_get_cr0(vmcb), vmcb_get_cr2(vmcb)); > - printk("CR3 =3D 0x%016"PRIx64" CR4 =3D 0x%016"PRIx64"\n", > - vmcb_get_cr3(vmcb), vmcb_get_cr4(vmcb)); > - printk("RSP =3D 0x%016"PRIx64" RIP =3D 0x%016"PRIx64"\n", > - vmcb->rsp, vmcb->rip); > - printk("RAX =3D 0x%016"PRIx64" RFLAGS=3D0x%016"PRIx64"\n", > - vmcb->rax, vmcb->rflags); > - printk("DR6 =3D 0x%016"PRIx64", DR7 =3D 0x%016"PRIx64"\n", > - vmcb_get_dr6(vmcb), vmcb_get_dr7(vmcb)); > - printk("CSTAR =3D 0x%016"PRIx64" SFMask =3D 0x%016"PRIx64"\n", > - vmcb->cstar, vmcb->sfmask); > - printk("KernGSBase =3D 0x%016"PRIx64" PAT =3D 0x%016"PRIx64"\n", > - vmcb->kerngsbase, vmcb_get_g_pat(vmcb)); > - printk("SSP =3D 0x%016"PRIx64" S_CET =3D 0x%016"PRIx64" ISST =3D 0x%= 016"PRIx64"\n", > - vmcb->_ssp, vmcb->_msr_s_cet, vmcb->_msr_isst); > - printk("H_CR3 =3D 0x%016"PRIx64" CleanBits =3D %#x\n", > - vmcb_get_h_cr3(vmcb), vmcb->cleanbits.raw); > - > - /* print out all the selectors */ > - printk(" sel attr limit base\n"); > - svm_dump_sel(" CS", &vmcb->cs); > - svm_dump_sel(" DS", &vmcb->ds); > - svm_dump_sel(" SS", &vmcb->ss); > - svm_dump_sel(" ES", &vmcb->es); > - svm_dump_sel(" FS", &vmcb->fs); > - svm_dump_sel(" GS", &vmcb->gs); > - svm_dump_sel("GDTR", &vmcb->gdtr); > - svm_dump_sel("LDTR", &vmcb->ldtr); > - svm_dump_sel("IDTR", &vmcb->idtr); > - svm_dump_sel(" TR", &vmcb->tr); > -} > - > -bool svm_vmcb_isvalid(const char *from, const struct vmcb_struct *vmcb, > - const struct vcpu *v, bool verbose) > -{ > - bool ret =3D false; /* ok */ > - unsigned long cr0 =3D vmcb_get_cr0(vmcb); > - unsigned long cr3 =3D vmcb_get_cr3(vmcb); > - unsigned long cr4 =3D vmcb_get_cr4(vmcb); > - unsigned long valid; > - uint64_t efer =3D vmcb_get_efer(vmcb); > - > -#define PRINTF(fmt, args...) do { \ > - if ( !verbose ) return true; \ > - ret =3D true; \ > - printk(XENLOG_GUEST "%pv[%s]: " fmt, v, from, ## args); \ > -} while (0) > - > - if ( !(efer & EFER_SVME) ) > - PRINTF("EFER: SVME bit not set (%#"PRIx64")\n", efer); > - > - if ( !(cr0 & X86_CR0_CD) && (cr0 & X86_CR0_NW) ) > - PRINTF("CR0: CD bit is zero and NW bit set (%#"PRIx64")\n", cr0)= ; > - > - if ( cr0 >> 32 ) > - PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0); > - > - if ( (cr0 & X86_CR0_PG) && > - ((cr3 & 7) || > - ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0))= || > - ((efer & EFER_LMA) && > - (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) ) > - PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3); > - > - valid =3D hvm_cr4_guest_valid_bits(v->domain); > - if ( cr4 & ~valid ) > - PRINTF("CR4: invalid value %#lx (valid %#lx, rejected %#lx)\n", > - cr4, valid, cr4 & ~valid); > - > - if ( vmcb_get_dr6(vmcb) >> 32 ) > - PRINTF("DR6: bits [63:32] are not zero (%#"PRIx64")\n", > - vmcb_get_dr6(vmcb)); > - > - if ( vmcb_get_dr7(vmcb) >> 32 ) > - PRINTF("DR7: bits [63:32] are not zero (%#"PRIx64")\n", > - vmcb_get_dr7(vmcb)); > - > - if ( efer & ~EFER_KNOWN_MASK ) > - PRINTF("EFER: unknown bits are not zero (%#"PRIx64")\n", efer); > - > - if ( hvm_efer_valid(v, efer, -1) ) > - PRINTF("EFER: %s (%"PRIx64")\n", hvm_efer_valid(v, efer, -1), ef= er); > - > - if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) ) > - { > - if ( !(cr4 & X86_CR4_PAE) ) > - PRINTF("EFER_LME and CR0.PG are both set and CR4.PAE is zero= \n"); > - if ( !(cr0 & X86_CR0_PE) ) > - PRINTF("EFER_LME and CR0.PG are both set and CR0.PE is zero\= n"); > - } > - > - if ( (efer & EFER_LME) && (cr0 & X86_CR0_PG) && (cr4 & X86_CR4_PAE) = && > - vmcb->cs.l && vmcb->cs.db ) > - PRINTF("EFER_LME, CR0.PG, CR4.PAE, CS.L and CS.D are all non-zer= o\n"); > - > - if ( !(vmcb_get_general2_intercepts(vmcb) & GENERAL2_INTERCEPT_VMRUN= ) ) > - PRINTF("GENERAL2_INTERCEPT: VMRUN intercept bit is clear (%#"PRI= x32")\n", > - vmcb_get_general2_intercepts(vmcb)); > - > - if ( vmcb->event_inj.resvd1 ) > - PRINTF("eventinj: MBZ bits are set (%#"PRIx64")\n", > - vmcb->event_inj.raw); > - > -#undef PRINTF > - return ret; > -} > - > -/* > - * Local variables: > - * mode: C > - * c-file-style: "BSD" > - * c-basic-offset: 4 > - * tab-width: 4 > - * indent-tabs-mode: nil > - * End: > - */ > diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c > index 44fa76bf0228..b1a79d515143 100644 > --- a/xen/arch/x86/hvm/svm/vmcb.c > +++ b/xen/arch/x86/hvm/svm/vmcb.c > @@ -228,6 +228,165 @@ void svm_destroy_vmcb(struct vcpu *v) > svm->vmcb =3D NULL; > } > =20 > +static void svm_dump_sel(const char *name, const struct segment_register= *s) > +{ > + printk("%s: %04x %04x %08x %016"PRIx64"\n", > + name, s->sel, s->attr, s->limit, s->base); > +} > + > +void svm_vmcb_dump(const char *from, const struct vmcb_struct *vmcb) > +{ > + struct vcpu *curr =3D current; > + > + /* > + * If we are dumping the VMCB currently in context, some guest state= may > + * still be cached in hardware. Retrieve it. > + */ > + if ( vmcb =3D=3D curr->arch.hvm.svm.vmcb ) > + svm_sync_vmcb(curr, vmcb_in_sync); > + > + printk("Dumping guest's current state at %s...\n", from); > + printk("Size of VMCB =3D %zu, paddr =3D %"PRIpaddr", vaddr =3D %p\n"= , > + sizeof(struct vmcb_struct), virt_to_maddr(vmcb), vmcb); > + > + printk("cr_intercepts =3D %#x dr_intercepts =3D %#x " > + "exception_intercepts =3D %#x\n", > + vmcb_get_cr_intercepts(vmcb), vmcb_get_dr_intercepts(vmcb), > + vmcb_get_exception_intercepts(vmcb)); > + printk("general1_intercepts =3D %#x general2_intercepts =3D %#x\n", > + vmcb_get_general1_intercepts(vmcb), vmcb_get_general2_interce= pts(vmcb)); > + printk("iopm_base_pa =3D %#"PRIx64" msrpm_base_pa =3D %#"PRIx64" tsc= _offset =3D %#"PRIx64"\n", > + vmcb_get_iopm_base_pa(vmcb), vmcb_get_msrpm_base_pa(vmcb), > + vmcb_get_tsc_offset(vmcb)); > + printk("tlb_control =3D %#x vintr =3D %#"PRIx64" int_stat =3D %#"PRI= x64"\n", > + vmcb->tlb_control, vmcb_get_vintr(vmcb).bytes, > + vmcb->int_stat.raw); > + printk("event_inj %016"PRIx64", valid? %d, ec? %d, type %u, vector %= #x\n", > + vmcb->event_inj.raw, vmcb->event_inj.v, > + vmcb->event_inj.ev, vmcb->event_inj.type, > + vmcb->event_inj.vector); > + printk("exitcode =3D %#"PRIx64" exit_int_info =3D %#"PRIx64"\n", > + vmcb->exitcode, vmcb->exit_int_info.raw); > + printk("exitinfo1 =3D %#"PRIx64" exitinfo2 =3D %#"PRIx64"\n", > + vmcb->exitinfo1, vmcb->exitinfo2); > + printk("asid =3D %#x np_ctrl =3D %#"PRIx64":%s%s%s\n", > + vmcb_get_asid(vmcb), vmcb_get_np_ctrl(vmcb), > + vmcb_get_np(vmcb) ? " NP" : "", > + vmcb_get_sev(vmcb) ? " SEV" : "", > + vmcb_get_sev_es(vmcb) ? " SEV_ES" : ""); > + printk("virtual vmload/vmsave =3D %d, virt_ext =3D %#"PRIx64"\n", > + vmcb->virt_ext.fields.vloadsave_enable, vmcb->virt_ext.bytes)= ; > + printk("cpl =3D %d efer =3D %#"PRIx64" star =3D %#"PRIx64" lstar =3D= %#"PRIx64"\n", > + vmcb_get_cpl(vmcb), vmcb_get_efer(vmcb), vmcb->star, vmcb->ls= tar); > + printk("CR0 =3D 0x%016"PRIx64" CR2 =3D 0x%016"PRIx64"\n", > + vmcb_get_cr0(vmcb), vmcb_get_cr2(vmcb)); > + printk("CR3 =3D 0x%016"PRIx64" CR4 =3D 0x%016"PRIx64"\n", > + vmcb_get_cr3(vmcb), vmcb_get_cr4(vmcb)); > + printk("RSP =3D 0x%016"PRIx64" RIP =3D 0x%016"PRIx64"\n", > + vmcb->rsp, vmcb->rip); > + printk("RAX =3D 0x%016"PRIx64" RFLAGS=3D0x%016"PRIx64"\n", > + vmcb->rax, vmcb->rflags); > + printk("DR6 =3D 0x%016"PRIx64", DR7 =3D 0x%016"PRIx64"\n", > + vmcb_get_dr6(vmcb), vmcb_get_dr7(vmcb)); > + printk("CSTAR =3D 0x%016"PRIx64" SFMask =3D 0x%016"PRIx64"\n", > + vmcb->cstar, vmcb->sfmask); > + printk("KernGSBase =3D 0x%016"PRIx64" PAT =3D 0x%016"PRIx64"\n", > + vmcb->kerngsbase, vmcb_get_g_pat(vmcb)); > + printk("SSP =3D 0x%016"PRIx64" S_CET =3D 0x%016"PRIx64" ISST =3D 0x%= 016"PRIx64"\n", > + vmcb->_ssp, vmcb->_msr_s_cet, vmcb->_msr_isst); > + printk("H_CR3 =3D 0x%016"PRIx64" CleanBits =3D %#x\n", > + vmcb_get_h_cr3(vmcb), vmcb->cleanbits.raw); > + > + /* print out all the selectors */ > + printk(" sel attr limit base\n"); > + svm_dump_sel(" CS", &vmcb->cs); > + svm_dump_sel(" DS", &vmcb->ds); > + svm_dump_sel(" SS", &vmcb->ss); > + svm_dump_sel(" ES", &vmcb->es); > + svm_dump_sel(" FS", &vmcb->fs); > + svm_dump_sel(" GS", &vmcb->gs); > + svm_dump_sel("GDTR", &vmcb->gdtr); > + svm_dump_sel("LDTR", &vmcb->ldtr); > + svm_dump_sel("IDTR", &vmcb->idtr); > + svm_dump_sel(" TR", &vmcb->tr); > +} > + > +bool svm_vmcb_isvalid( > + const char *from, const struct vmcb_struct *vmcb, const struct vcpu = *v, > + bool verbose) ... here, which is probably unintentional. If intentional it's worth mentio= ning in the commit message and worth keeping in sync with the form in the protot= ype. I personally prefer the former style rather than this one, FWIW. Cheers, Alejandro