From: "Danilo Krummrich" <dakr@kernel.org>
To: "Boris Brezillon" <boris.brezillon@collabora.com>
Cc: "Deborah Brouwer" <deborah.brouwer@collabora.com>,
dri-devel@lists.freedesktop.org, rust-for-linux@vger.kernel.org,
"Boqun Feng" <boqun@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Miguel Ojeda" <ojeda@kernel.org>, "Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Trevor Gross" <tmgross@umich.edu>,
"Steven Price" <steven.price@arm.com>,
"Dirk Behme" <dirk.behme@gmail.com>,
"Alexandre Courbot" <acourbot@nvidia.com>
Subject: Re: [PATCH v3 01/12] drm/tyr: Use register! macro for GPU_CONTROL
Date: Tue, 24 Mar 2026 18:31:42 +0100 [thread overview]
Message-ID: <DHB6WU5SYXU7.2QMPFZG1KDOT8@kernel.org> (raw)
In-Reply-To: <20260324130653.74f9c2ab@fedora>
On Tue Mar 24, 2026 at 1:06 PM CET, Boris Brezillon wrote:
> It's defined in ascending bit order in the datasheets we have, so if
> we're ever going to auto-generate those from the xml, we'd likely have
> the same definitions Deborah came up with, unless the script re-orders
> things in descending bit order.
Huh, that is very uncommon; is it actually
15:0
31:16
or is it
0:15
16:31
in your datasheets?
next prev parent reply other threads:[~2026-03-24 17:31 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-24 0:18 [PATCH v3 00/12] drm/tyr: Use register! macro Deborah Brouwer
2026-03-24 0:18 ` [PATCH v3 01/12] drm/tyr: Use register! macro for GPU_CONTROL Deborah Brouwer
2026-03-24 9:56 ` Boris Brezillon
2026-03-24 11:23 ` Danilo Krummrich
2026-03-24 12:06 ` Boris Brezillon
2026-03-24 17:31 ` Danilo Krummrich [this message]
2026-03-24 18:15 ` Boris Brezillon
2026-03-24 19:03 ` Danilo Krummrich
2026-03-24 0:18 ` [PATCH v3 02/12] drm/tyr: Print GPU_ID without filtering Deborah Brouwer
2026-03-24 9:54 ` Boris Brezillon
2026-03-24 0:18 ` [PATCH v3 03/12] drm/tyr: Set interconnect coherency during probe Deborah Brouwer
2026-03-24 9:55 ` Boris Brezillon
2026-03-24 0:18 ` [PATCH v3 04/12] drm/tyr: Use register! macro for JOB_CONTROL Deborah Brouwer
2026-03-24 10:00 ` Boris Brezillon
2026-03-24 0:18 ` [PATCH v3 05/12] drm/tyr: Use register! macro for MMU_CONTROL Deborah Brouwer
2026-03-24 10:01 ` Boris Brezillon
2026-03-24 0:18 ` [PATCH v3 06/12] drm/tyr: Remove custom register struct Deborah Brouwer
2026-03-24 10:02 ` Boris Brezillon
2026-03-24 0:18 ` [PATCH v3 07/12] drm/tyr: Add MMU address space registers Deborah Brouwer
2026-03-24 10:03 ` Boris Brezillon
2026-03-24 0:18 ` [PATCH v3 08/12] drm/tyr: Add fields for MEMATTR register Deborah Brouwer
2026-03-24 10:05 ` Boris Brezillon
2026-03-24 0:18 ` [PATCH v3 09/12] drm/tyr: Add fields for COMMAND register Deborah Brouwer
2026-03-24 10:09 ` Boris Brezillon
2026-03-24 0:18 ` [PATCH v3 10/12] drm/tyr: Add fields for FAULTSTATUS register Deborah Brouwer
2026-03-24 0:18 ` [PATCH v3 11/12] drm/tyr: Add fields for TRANSCFG register Deborah Brouwer
2026-03-24 0:18 ` [PATCH v3 12/12] drm/tyr: Add DOORBELL_BLOCK registers Deborah Brouwer
2026-03-24 10:10 ` Boris Brezillon
2026-03-24 10:58 ` [PATCH v3 00/12] drm/tyr: Use register! macro Alice Ryhl
2026-03-24 12:35 ` Boris Brezillon
2026-04-02 22:07 ` Deborah Brouwer
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