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The default baremetal heap sizing is far too small for > vGPU instance, causing GSP-RM to hit out-of-memory failures during VF > initialization. > > The host driver must reserve the correct heap size before GSP boots, > because the WPR2 region is locked down by the hardware after boot and > cannot be resized at runtime. The firmware determines the per-VF carve > from the gspFwHeapVfPartitionCount field in the WPR2 metadata header. > > Select a pre-calibrated static heap size based on total_vfs (174 MB for > 1 VM, 581 MB for 2-32 VFs, 1370 MB for 48 VFs) and set > vf_partition_count accordingly. Extend FbLayout::new() and > GspBootContext to propagate total_vfs through the boot path. > > Signed-off-by: Zhi Wang > --- > drivers/gpu/nova-core/fb.rs | 17 +++++++++++++---- > drivers/gpu/nova-core/gsp.rs | 2 +- > drivers/gpu/nova-core/gsp/boot.rs | 14 +++++++++++--- > drivers/gpu/nova-core/gsp/fw.rs | 12 ++++++++++++ > 4 files changed, 37 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs > index 725e428154cf..fb4e6aa9fda4 100644 > --- a/drivers/gpu/nova-core/fb.rs > +++ b/drivers/gpu/nova-core/fb.rs > @@ -171,7 +171,13 @@ pub(crate) struct FbLayout { > =20 > impl FbLayout { > /// Computes the FB layout for `chipset` required to run the `gsp_fw= ` GSP firmware. > - pub(crate) fn new(chipset: Chipset, bar: Bar0<'_>, gsp_fw: &GspFirmw= are) -> Result { > + pub(crate) fn new( > + chipset: Chipset, > + bar: Bar0<'_>, > + gsp_fw: &GspFirmware, > + vgpu_requested: bool, > + total_vfs: u16, `total_vfs` is only meaningful if `vgpu_requested` is true. So these two parameters would be better modeled using an `Option`, or maybe even better a dedicated parameter type for vGPU settings? Something like (please pick a better name if any): enum VgpuRequest { Disabled, Requested { total_vfs: u16, } } > + ) -> Result { > let hal =3D hal::fb_hal(chipset); > =20 > let fb =3D { > @@ -236,8 +242,11 @@ pub(crate) fn new(chipset: Chipset, bar: Bar0<'_>, g= sp_fw: &GspFirmware) -> Resu > =20 > let wpr2_heap =3D { > const WPR2_HEAP_DOWN_ALIGN: Alignment =3D Alignment::new::(); > - let wpr2_heap_size =3D > - gsp::LibosParams::from_chipset(chipset).wpr_heap_size(ch= ipset, fb.end)?; > + let wpr2_heap_size =3D if vgpu_requested { > + gsp::vgpu_fw_heap_size(u32::from(total_vfs)) > + } else { > + gsp::LibosParams::from_chipset(chipset).wpr_heap_size(ch= ipset, fb.end)? > + }; > let wpr2_heap_addr =3D (elf.start - wpr2_heap_size).align_do= wn(WPR2_HEAP_DOWN_ALIGN); > =20 > FbRange(wpr2_heap_addr..(elf.start).align_down(WPR2_HEAP_DOW= N_ALIGN)) > @@ -265,7 +274,7 @@ pub(crate) fn new(chipset: Chipset, bar: Bar0<'_>, gs= p_fw: &GspFirmware) -> Resu > wpr2_heap, > wpr2, > heap, > - vf_partition_count: 0, > + vf_partition_count: if vgpu_requested { total_vfs as u8 } el= se { 0 }, > pmu_reserved_size: hal.pmu_reserved_size(), > }) > } > diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs > index 94cd4a784b79..921b92c9eb92 100644 > --- a/drivers/gpu/nova-core/gsp.rs > +++ b/drivers/gpu/nova-core/gsp.rs > @@ -27,6 +27,7 @@ > mod sequencer; > =20 > pub(crate) use fw::{ > + vgpu_fw_heap_size, > GspFmcBootParams, > GspFwWprMeta, > LibosParams, // > @@ -59,7 +60,6 @@ pub(crate) struct GspBootContext<'a> { > pub(crate) gsp_falcon: &'a Falcon, > pub(crate) sec2_falcon: &'a Falcon, > pub(crate) vgpu_requested: Cell, > - #[expect(dead_code)] > pub(crate) total_vfs: u16, > } > =20 > diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gs= p/boot.rs > index 2981d02d15ad..7c1f3f962fbe 100644 > --- a/drivers/gpu/nova-core/gsp/boot.rs > +++ b/drivers/gpu/nova-core/gsp/boot.rs > @@ -111,7 +111,13 @@ pub(crate) fn boot( > GFP_KERNEL, > )?; > =20 > - let fb_layout =3D FbLayout::new(ctx.chipset, ctx.bar, &gsp_fw)?; > + let fb_layout =3D FbLayout::new( > + ctx.chipset, > + ctx.bar, > + &gsp_fw, > + ctx.vgpu_requested.get(), > + ctx.total_vfs, > + )?; > dev_dbg!(dev, "{:#x?}\n", fb_layout); > =20 > let wpr_meta =3D Coherent::init(dev, GFP_KERNEL, GspFwWprMeta::n= ew(&gsp_fw, &fb_layout))?; > @@ -138,8 +144,10 @@ pub(crate) fn boot( > =20 > self.cmdq > .send_command_no_wait(ctx.bar, commands::SetSystemInfo::new(= ctx.pdev, ctx.chipset))?; > - self.cmdq > - .send_command_no_wait(ctx.bar, commands::SetRegistry::new(ct= x.vgpu_requested.get())?)?; > + self.cmdq.send_command_no_wait( > + ctx.bar, > + commands::SetRegistry::new(ctx.vgpu_requested.get())?, > + )?; > =20 > hal.post_boot(&self, ctx, &gsp_fw)?; > =20 > diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/= fw.rs > index 14424a2c2d83..2f3cbc5d5114 100644 > --- a/drivers/gpu/nova-core/gsp/fw.rs > +++ b/drivers/gpu/nova-core/gsp/fw.rs > @@ -101,6 +101,18 @@ pub(in crate::gsp) fn advance_cpu_write_ptr(qs: &Coh= erent, count: u32) { > pub(crate) const GSP_MSG_QUEUE_ELEMENT_SIZE_MAX: usize =3D > num::u32_as_usize(bindings::GSP_MSG_QUEUE_ELEMENT_SIZE_MAX); > =20 > +const GSP_FW_HEAP_SIZE_VGPU_1VM: u64 =3D 174 * u64::SZ_1M; > +const GSP_FW_HEAP_SIZE_VGPU_DEFAULT: u64 =3D 581 * u64::SZ_1M; > +const GSP_FW_HEAP_SIZE_VGPU_48VMS: u64 =3D 1370 * u64::SZ_1M; Do we have a source of truth for these values? I can see definitions for `GSP_FW_HEAP_SIZE_VGPU_DEFAULT` and `GSP_FW_HEAP_SIZE_VGPU_48VMS` in OpenRM (meaning we could generate bindings for them), but cannot find a reference for `GSP_FW_HEAP_SIZE_VGPU_1VM`...