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Sat, 18 Jul 2026 10:52:49 -0700 (PDT) X-Received: by 2002:a17:90b:590e:b0:387:d5bd:622f with SMTP id 98e67ed59e1d1-38e4b691d21mr6469894a91.18.1784397168875; Sat, 18 Jul 2026 10:52:48 -0700 (PDT) Received: from localhost ([188.253.117.185]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31429f9d439sm23819967eec.5.2026.07.18.10.52.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 18 Jul 2026 10:52:48 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Sun, 19 Jul 2026 01:52:44 +0800 Message-Id: Cc: , , Subject: Re: [PATCH v2 3/8] drm/mcde: replace struct drm_simple_display_pipe with regular atomic helpers From: "Ze Huang" To: , "Ze Huang" X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20260716-drm-simple-kms-removal-v2-0-1133a8fc3785@oss.qualcomm.com> <20260716-drm-simple-kms-removal-v2-3-1133a8fc3785@oss.qualcomm.com> <20260716092109.A755F1F00A3A@smtp.kernel.org> In-Reply-To: <20260716092109.A755F1F00A3A@smtp.kernel.org> X-Authority-Analysis: v=2.4 cv=HpxG3UTS c=1 sm=1 tr=0 ts=6a5bbd72 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=RQ3dwY0XcLBFaqRX7rIGyg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=Xo--NF9sZlCFNlXQFFYA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-GUID: 4pJYuvbZWOYCwJ5whynzbbvIiLa6XsME X-Proofpoint-ORIG-GUID: 4pJYuvbZWOYCwJ5whynzbbvIiLa6XsME X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE4MDE4NyBTYWx0ZWRfX+gu+YNBlbZRB li5gJfo49G1wTledC6+tSq5cf4rt9qR09Ci+eN6EOxyo4DTBj8KK0PZrVdcEL+/etMTpLli+Lgp e9vtZF2SIB0r/DYtUP0rYd9FBXkSKrdS4RR5lH5s5AGwJ6ZvDU+uzPkXG6dzSK2h1S6eJsz6zk6 jcf5O1534TOoPffndzpRTRi3c1GwA+5k98LnsJHfTmuxam3uJKHryjhBzm52TIZlF9L8WZQ5nOv +WJ+XsvvwDzQySRMST/p5nBnGlgNDwqRpCwQe5ONCmpujmCMe/vVKTNeiMn+SG6k2JQ6VaA9Vn+ for1iahhqVQ2QU6X3OASK6C64X2NR/gzo88zASSud1ZWFCcwciKOBhHv4eI/SRenLWlrZHpE4Ck bB3H26mHx6t34Lu0O6EBiokW8rm1WuB3EMmfdry74/v+z6veoim1cUADX9IviT69xt7blVSQWvj 3oF7AsVCzaBzUW673pw== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE4MDE4NyBTYWx0ZWRfX/nMmnklE+4qr 2sk2MYc5nv/TTqZibGlv9iD3sQUGDpkAh20kdb54PnYXjqgL4cOQWxtXByk1iMkpiXs17j4FN9z 82C2sraCSy86feoKVd5S4ATrMHZ0qhk= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-18_05,2026-07-17_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 malwarescore=0 clxscore=1015 priorityscore=1501 adultscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607180187 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu Jul 16, 2026 at 5:21 PM CST, sashiko-bot wrote: > Thank you for your contribution! Sashiko AI review found 1 potential issu= e(s) to consider: > - [High] Race condition in atomic commit causing display hang in oneshot = mode due to premature hardware start. > -- > > --- Patch [3]: [PATCH v2 3/8] drm/mcde: replace struct drm_simple_display= _pipe with regular atomic helpers --- > commit 24a767bb6a2c4adfefe9e0a5de7e9c8bbe7b2a64 > Author: Ze Huang > > drm/mcde: replace struct drm_simple_display_pipe with regular atomic help= ers > > Convert MCDE to explicit plane, CRTC and encoder objects. Handle pending > page-flip events from the CRTC atomic flush path using the commit-local > CRTC state. > >> diff --git a/drivers/gpu/drm/mcde/mcde_display.c b/drivers/gpu/drm/mcde/= mcde_display.c >> index 257a6e84dd583..86edf94c52372 100644 >> --- a/drivers/gpu/drm/mcde/mcde_display.c >> +++ b/drivers/gpu/drm/mcde/mcde_display.c > [ ... ] >> @@ -1381,44 +1398,13 @@ static void mcde_set_extsrc(struct mcde *mcde, u= 32 buffer_address) >> -static void mcde_display_update(struct drm_simple_display_pipe *pipe, >> - struct drm_plane_state *old_pstate) >> +static void mcde_plane_helper_atomic_update(struct drm_plane *plane, >> + struct drm_atomic_commit *commit) >> { >> - struct drm_crtc *crtc =3D &pipe->crtc; >> - struct drm_device *drm =3D crtc->dev; >> - struct mcde *mcde =3D to_mcde(drm); >> - struct drm_pending_vblank_event *event =3D crtc->state->event; >> - struct drm_plane *plane =3D &pipe->plane; >> - struct drm_plane_state *pstate =3D plane->state; >> + struct drm_plane_state *pstate =3D drm_atomic_get_new_plane_state(comm= it, plane); >> + struct mcde *mcde =3D to_mcde(plane->dev); >> struct drm_framebuffer *fb =3D pstate->fb; >> =20 >> - /* >> - * Handle any pending event first, we need to arm the vblank >> - * interrupt before sending any update to the display so we don't >> - * miss the interrupt. >> - */ >> - if (event) { > [ ... ] >> - spin_unlock_irq(&crtc->dev->event_lock); >> - } >> - >> /* >> * We do not start sending framebuffer updates before the >> * display is enabled. Update events will however be dispatched > [ ... ] >> -static int mcde_display_enable_vblank(struct drm_simple_display_pipe *p= ipe) >> +static void mcde_crtc_helper_atomic_flush(struct drm_crtc *crtc, >> + struct drm_atomic_commit *commit) >> +{ >> + struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(co= mmit, crtc); >> + struct drm_pending_vblank_event *event =3D crtc_state->event; >> + >> + /* >> + * Handle any pending event first, we need to arm the vblank >> + * interrupt before sending any update to the display so we don't >> + * miss the interrupt. >> + */ >> + if (!event) >> + return; > > [Severity: High] > Does this split introduce a race condition that could hang the pipeline i= n > oneshot mode? > > Because the DRM core executes the plane's atomic_update callback before t= he > CRTC's atomic_flush callback, the hardware flow is now started before the > vblank event is armed. > > If mcde_start_flow() is triggered during mcde_plane_helper_atomic_update(= ) > (which happens just below the quoted block), it could complete the hardwa= re > transfer and fire its interrupt before the vblank event gets armed later = in > mcde_crtc_helper_atomic_flush(). > > The relocated comment in atomic_flush still notes this exact requirement: > "we need to arm the vblank interrupt before sending any update to the > display so we don't miss the interrupt." > > If the interrupt fires early in oneshot mode, it will be missed, and the > atomic commit could wait indefinitely for an event that will never comple= te. Hi, Thomas Would it make more sense to move this pending vblank event handling to the CRTC's atomic_begin(), or should it simply go back to update()? >From the comment in the original code, the event needs to be armed before the update is triggered, otherwise the completion interrupt could be missed in oneshot mode. Thanks, Ze