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boundary="===============7528070105672286951==" Sender: "opensbi" Errors-To: opensbi-bounces+opensbi=archiver.kernel.org@lists.infradead.org --===============7528070105672286951== Content-Type: multipart/signed; boundary=ec4715875c630cd67acc119c5b246afcfd044e56e10985f09997482e20bb; micalg=pgp-sha512; protocol="application/pgp-signature" --ec4715875c630cd67acc119c5b246afcfd044e56e10985f09997482e20bb Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 On Fri Aug 21, 2026 at 9:28 PM +08, Heinrich Schuchardt wrote: > On 8/18/26 03:14, Troy Mitchell wrote: >> From: Xianbin Zhu >>=20 >> Add initial OpenSBI platform support for the SpacemiT K3 SoC, which has >> 16 harts: eight X100 harts in clusters C0/C1 and eight A100 harts in >> C2/C3. >>=20 >> During cold boot, the boot hart sets warm-boot entry vectors for all >> four clusters, enables CCI snooping, clears PMU power-down vote bits for >> all harts so WFI does not trigger power-down, and wakes all non-boot >> harts (1-15). Wait up to 100 ms for each secondary hart to enter WFI, >> then warn and continue so one failed hart cannot stall boot indefinitely= . >>=20 >> Run per-hart initialization from the nascent hook on both cold- and >> warm-boot paths. Program PMA attributes, enable the D-cache and I-cache >> through MSETUP, set smpen[x] in ML2SETUP to enable L1 D-cache snooping >> and prefetch, and enable the H extension in MISA for X100 harts. MISA.H >> is writable on K3 X100 cores, and M-mode must set it explicitly to >> activate hypervisor support. >>=20 >> Start secondary harts through an assembly stub that enables caches and >> sets smpen[x] before entering common warm-boot code. This lets them >> observe shared-data writes made by the boot hart during cold-boot >> initialization. Enable global CCI-550 snoop and DVM requests on the boot >> hart before waking the secondary harts. >>=20 >> Signed-off-by: Xianbin Zhu >> Co-developed-by: Troy Mitchell >> Signed-off-by: Troy Mitchell >> --- >> platform/generic/Kconfig | 5 + >> platform/generic/configs/defconfig | 1 + >> platform/generic/include/spacemit/common.h | 4 +- >> platform/generic/include/spacemit/k3.h | 144 ++++++++++++++++ >> platform/generic/include/spacemit/k3_asm.h | 16 ++ >> platform/generic/spacemit/k3.c | 266 +++++++++++++++++++++= ++++++++ >> platform/generic/spacemit/k3_asm.S | 33 ++++ >> platform/generic/spacemit/objects.mk | 2 + >> 8 files changed, 470 insertions(+), 1 deletion(-) >>=20 >> diff --git a/platform/generic/spacemit/objects.mk b/platform/generic/spa= cemit/objects.mk >> index 8309ad1f..282543b5 100644 >> --- a/platform/generic/spacemit/objects.mk >> +++ b/platform/generic/spacemit/objects.mk >> @@ -5,3 +5,5 @@ > > With this patch applied > > CROSS_COMPILE=3Driscv64-linux-gnu- \ > make PLATFORM_RISCV_XLEN=3D32 PLATFORM=3Dgeneric > > fails with errors like > > platform/generic/spacemit/k3.c:134:19: error: left shift count >=3D width= =20 > of type [-Werror=3Dshift-count-overflow] > 134 | << PMACFG0_AUDIO_BUF_FIELD_SHIFT); > > Please, ensure that the SpacemiT K3 and K1 platforms are not built in=20 > the 32bit case. Unfortunately PLATFORM_RISCV_XLEN is not a configuration= =20 > variable. > > Other platforms use > > ifeq ($(PLATFORM_RISCV_XLEN), 64) > > at the start of the *.mk file. Confirmed. K1 and K3 are RV64-only. I will add the XLEN guard to platform/generic/spacemit/objects.mk as suggested. --=20 Troy Mitchell --ec4715875c630cd67acc119c5b246afcfd044e56e10985f09997482e20bb Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iIMEABYKACsWIQSL4Ay2cExaPXAQcU2YCe+A+TM0LwUCao+muw0caUB0cm95LXku b3JnAAoJEJgJ74D5MzQv5KEBAI1UW1WpbOUVYcQ/RHDvjjbySmCD6HHQ+3qJlCo1 V4jkAP4y51Fc+zE+Z5k36+XIVmndCznWcpHprdnIGwRWyW4WCg== =cB2N -----END PGP SIGNATURE----- --ec4715875c630cd67acc119c5b246afcfd044e56e10985f09997482e20bb-- --===============7528070105672286951== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi --===============7528070105672286951==--