Re: [PATCH v3 00/10] gpu: nova-core: add PRAMIN window support

["Eliot Courtney" <ecourtney@nvidia.com>]

On Thu Aug 27, 2026 at 5:51 PM JST, Eliot Courtney wrote:
> This series adds support for the PRAMIN window, plus some documentation.
> Some of these patches were originally written by Joel Fernandes [1]. I
> have updated them with changelog notes in each patch. For example, I
> updated them for the newer IO machinery from Gary Guo.
>
> This series adds a Pramin structure which deals with updating the PRAMIN
> window and handing out typed MMIO views. The PRAMIN window is a method
> that lets arbitrary VRAM be written over BAR0 by configuring a 1 MiB
> window through GPU registers. That 1 MiB window can point anywhere in
> VRAM. This is useful for bootstrapping e.g. GPU side page tables.
>
> The Pramin structure hands out typed MMIO views to do writes through
> rather than letting callers write directly through it. A follow up
> series will add support for GPU side page table entry writing through
> this mechanism. This abstraction is important for later since we will
> eventually want to write the PTEs via BAR2 not PRAMIN - using a view
> that we grab from the Pramin structure can abstract this out.
>
> This is based on next-20260817 (e6664f2b33db), with Gary's register IO
> projection  v3 series [2] applied on top.
>
> [1]: https://lore.kernel.org/all/20260518180342.2387845-1-joelagnelf@nvidia.com/
> [2]: https://patch.msgid.link/20260819-typed_register-v3-0-3699a75fadf1@garyguo.net
>
> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com>
> ---
> Changes in v3:
> - Dropped first three Bounded patches which are merged now
> - Rebase on v3 of IO reg projections

Looks like this series still applies cleanly on top of the v4 of Gary's
IO register projections.