From: "Alexei Starovoitov" <alexei.starovoitov@gmail.com>
To: "Yazhou Tang" <tangyazhou@zju.edu.cn>, <bpf@vger.kernel.org>,
<ast@kernel.org>, <eddyz87@gmail.com>
Cc: <daniel@iogearbox.net>, <john.fastabend@gmail.com>,
<andrii@kernel.org>, <martin.lau@linux.dev>, <song@kernel.org>,
<yonghong.song@linux.dev>, <kpsingh@kernel.org>,
<sdf@fomichev.me>, <haoluo@google.com>, <jolsa@kernel.org>,
<tangyazhou518@outlook.com>, <shenghaoyuan0928@163.com>,
<ziye@zju.edu.cn>
Subject: Re: [RFC PATCH bpf-next 1/6] bpf: Add UHMUL and SHMUL instructions
Date: Fri, 11 Sep 2026 20:40:21 -0700 [thread overview]
Message-ID: <DLD0Y0CFA97S.3RC5RTORRYY9N@gmail.com> (raw)
In-Reply-To: <94eba3a8-6bca-432b-859b-d14e608d34f2@zju.edu.cn>
On Tue Sep 8, 2026 at 1:30 AM PDT, Yazhou Tang wrote:
>
>
> On 9/8/26 3:51 AM, Alexei Starovoitov wrote:
>> On Wed Sep 2, 2026 at 12:05 AM PDT, Yazhou Tang wrote:
>>> From: Tianci Cao <ziye@zju.edu.cn>
>>>
>>> Define UHMUL and SHMUL as BPF_ALU64 BPF_MUL variants selected by insn->off.
>>> UHMUL returns the high 64 bits of an unsigned 64-by-64-bit product, while
>>> SHMUL returns the high 64 bits of a signed product. Keep off == 0 as the
>>> existing low-half multiplication, and assign off == 1 and off == 2 to
>>> UHMUL and SHMUL, respectively.
>>>
>>> These operations are inspired by the UHMUL and SHMUL instructions
>>> introduced as part of the PQR instruction class in Solana sBPF[1].
>>>
>>> The encoding and immediate semantics differ from current sBPF.
>>>
>>> 1. Solana sBPF assigns these operations dedicated opcodes in the BPF_PQR
>>> class, whereas this implementation selects them through the offset
>>> field of BPF_MUL.
>>>
>>> 2. Solana sBPF initially sign-extended the immediate operand of UHMUL,
>>> but later changed unsigned PQR immediates, including UHMUL, to be
>>> zero-extended[2].
>>
>> Why did you switch to zero-extend ?
>> Sounds odd to do zero extend just for these ops.
>
> Sorry, I wasn't clear. This patch does not zero-extend the UHMUL immediate.
>
> Both UHMUL and SHMUL follow the existing BPF_ALU64 convention and
> sign-extend the 32-bit immediate to 64 bits first. The zero-extension
> I mentioned refers only to current Solana sBPF behavior. I'll clarify
> this in the respin.
My question was "why in Solana you switched to zero-extend?"
next prev parent reply other threads:[~2026-09-12 3:40 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 7:05 [RFC PATCH bpf-next 0/6] bpf: Add UHMUL and SHMUL instructions Yazhou Tang
2026-09-02 7:05 ` [RFC PATCH bpf-next 1/6] " Yazhou Tang
2026-09-07 19:51 ` Alexei Starovoitov
2026-09-08 8:30 ` Yazhou Tang
2026-09-12 3:40 ` Alexei Starovoitov [this message]
2026-09-02 7:05 ` [RFC PATCH bpf-next 2/6] bpf, x86: JIT UHMUL and SHMUL on x86-64 Yazhou Tang
2026-09-02 7:05 ` [RFC PATCH bpf-next 3/6] bpf: Reject UHMUL/SHMUL in unsupported JITs Yazhou Tang
2026-09-02 7:21 ` sashiko-bot
2026-09-02 8:09 ` Yazhou Tang
2026-09-07 19:53 ` Alexei Starovoitov
2026-09-08 8:32 ` Yazhou Tang
2026-09-02 7:05 ` [RFC PATCH bpf-next 4/6] bpf: Refactor ALU instruction variant validation Yazhou Tang
2026-09-02 7:05 ` [RFC PATCH bpf-next 5/6] bpf: Add verifier support for UHMUL and SHMUL Yazhou Tang
2026-09-02 7:05 ` [RFC PATCH bpf-next 6/6] selftests/bpf: Add bytecode tests " Yazhou Tang
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