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charset=UTF-8 Date: Thu, 05 Nov 2026 11:10:47 +0800 Message-Id: Cc: "Bruno Banelli" , , , , "Alex Elder" , "Yixun Lan" , "Lorenzo Pieralisi" , "Krzysztof Wilczynski" , "Rob Herring" , "Bjorn Helgaas" , "Danilo Krummrich" , "Uwe Kleine-Koenig" , "Javier Martinez Canillas" , , "linux-riscv" Subject: Re: [BUG] PCI: spacemit-k1: port C probe hard-hangs a CPU with one endpoint on Milk-V Jupiter From: "Encrow Thorne" To: "Manivannan Sadhasivam" , "Encrow Thorne" X-Mailer: aerc 0.22.0-0-gc2f86b7abde3 References: <20260825052249.66921-1-bbanelli@gmail.com> In-Reply-To: X-QQ-SENDSIZE: 520 Feedback-ID: zesmtpgz:linux.spacemit.com:qybglogicsvrsz:qybglogicsvrsz3b-0 X-QQ-XMAILINFO: M6X4Jj6nmWQyum/iMKz8TxjkkJ7y/4Dfp2UGPg1Nck+98wNvcvLORLQs MTB5O+r07L6tCVLtuO8Q2MdhRqzq3TxfbCYqtA8mThs/mJQ42AJCsWlUrjwCKmKxSEB0st/ IjM7gJMpl0vK+PMSooTN8SVRqieZ9ohDChhZds9zyGQwfDtKk4TQvltDqb+9r330b+XCY+0 iL1HPFkOuIMKeReO07ijlngEnPv9NVlpprYEv2MMlXcxxS5MCLD0SaCbe3ELsyBUueufj9q i+HszP7fBQWcQV5w12SegnqyLOSnvypcpnuwZ7Jgu/+yOTcO/kzScYLVawOCiRNk7qU+/4m 4/Jpb4G2toR/IWVsOL4uL9sM0yy4EGML/hTPlt/tLUqnceEUCsxsIVnUWOvAzF4Kz292Ne/ be/SKCQ4e8d3yMAZyYOO+JgK0M6OV7fGiN35oVomkIgnSe3R+1zf1b6vLecf1n+wEev76bH P7ireGMJUrUFQ88J3Thhl8TRmVuJIsHY3bBwaGHYSjQWL4jowG6pUBpkYS1/IXP7xByB27k edIQjGjNwWIIzRQZunTLQbMYB6A5/Wv/5gRj8Gaf88nmSM54n5K44c1svqCW96ozymjZEwx aNP+VCuXVPeulZgLk/NVYczO7u9rrkJ3wGwjkSmzOAQzHeY2EoMOgqgKBMXIDXyGndvFtJO 25FLZQ89F+jPQBZ+DHVgRICDkuTQ8ff/CMGLFPa5NdTELSRaoQVVCrCeyUft5NIPe6laAfM hPXNKGIdq+rjamRW6q7/kOucLU2ryC/KKQgUIVJE52C+F3x0hXXs8hOJu6uFZLA+c3w6aX2 +bh2Vpc+n13mQuSXsPDfyNKyZRaJH8fdac44JSlLIk4ytcSsBMsBZ1mCSlIB06+ATCh4ePp o6IS5E7coP1OgX6UjxVZCmEZsebL1WeTIfXtELzTWMKuzdIAPuvrpRHWfe9WyeU2nMbI0hY bE7hxXQzVrocer1d+7Cw0BP3CPTbGcRnrkpXDx8bk7RPCmprqd6HnWyYCqZSMegoHSPu6qq HIwRdlow== X-QQ-XMRINFO: NyFYKkN4Ny6FuXrnB5Ye7Aabb3ujjtK+gg== X-QQ-RECHKSPAM: 0 On Mon Sep 21, 2026 at 4:03 PM CST, Manivannan Sadhasivam wrote: > On Mon, Sep 21, 2026 at 01:55:42PM +0800, Encrow Thorne wrote: > > [...] > >> Hi Bruno, >>=20 >> The issue was caused by a missing hardware configuration in the K1 PCIe >> initialization. >>=20 >> The PMU PCIE_CONTROL_LOGIC register contains an IGNORE_PERSTN bit (BIT(2= )). >> The hardware manual describes it as follows: >>=20 >> =E2=80=9CWhen set to 1, the PCIe controller and PHY ignore the PERSTN si= gnal from >> the link partner in both RC and EP modes.=E2=80=9D >>=20 >> This bit was not configured during RC initialization. As a result, the >> controller and PHY could still be affected by the PERSTN input during th= e >> early DBI accesses. With the Intel I225-V installed, the first DBI acces= s >> could remain pending and hang the CPU. >>=20 > Hi Mani, > What does this 'PERSTN' bit controls? PERST# or something else? PERST# is > controlled only by the Root Complex btw. Also, why does this missing regi= ster > configuration only affecting Intel I225-V endpoint and not others? > > - Mani PCIE_IGNORE_PERSTN masks the PERST# pad input to the local K1 controller and PHY. It does not control the external PERST# output. On K1, this input path remains active even in RC mode, so a low level on the pad can also hold the local controller in reset. We found a 1 kOhm pull-down on the PERST# line of the particular Intel card we tested. Together with the Jupiter board's 10 kOhm pull-up, this kept PERST# low from power-on, including during the first DBI access. The other devices we tested did not hold the line low in this way. After removing the card's pull-down, PERST# reached 3.3 V. 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