From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Gs3Cw-0007JS-Hw for qemu-devel@nongnu.org; Wed, 06 Dec 2006 15:17:34 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Gs3Cu-0007J8-9M for qemu-devel@nongnu.org; Wed, 06 Dec 2006 15:17:33 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Gs3Cu-0007J5-4J for qemu-devel@nongnu.org; Wed, 06 Dec 2006 15:17:32 -0500 Received: from [199.232.41.3] (helo=savannah.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1Gs3Cu-0004xD-2P for qemu-devel@nongnu.org; Wed, 06 Dec 2006 15:17:32 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69] helo=savannah.gnu.org) by savannah.gnu.org with esmtp (Exim 4.50) id 1Gs3Ct-0008Bw-4i for qemu-devel@nongnu.org; Wed, 06 Dec 2006 20:17:31 +0000 Received: from ths by savannah.gnu.org with local (Exim 4.50) id 1Gs3Cs-0008Bt-Th for qemu-devel@nongnu.org; Wed, 06 Dec 2006 20:17:31 +0000 Message-Id: From: Thiemo Seufer Date: Wed, 06 Dec 2006 20:17:30 +0000 Subject: [Qemu-devel] qemu/target-mips cpu.h exec.h helper.c mips-def... Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org CVSROOT: /sources/qemu Module name: qemu Changes by: Thiemo Seufer 06/12/06 20:17:30 Modified files: target-mips : cpu.h exec.h helper.c mips-defs.h op.c op_helper.c translate.c Log message: Add MIPS32R2 instructions, and generally straighten out the instruction decoding. This is also the first percent towards MIPS64 support. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/cpu.h?cvsroot=qemu&r1=1.12&r2=1.13 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/exec.h?cvsroot=qemu&r1=1.11&r2=1.12 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemu&r1=1.16&r2=1.17 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/mips-defs.h?cvsroot=qemu&r1=1.4&r2=1.5 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.14&r2=1.15 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemu&r1=1.19&r2=1.20 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.21&r2=1.22