From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>,
netdev@vger.kernel.org, Paolo Abeni <pabeni@redhat.com>
Subject: [PATCH RFC net-next v2 4/7] net: stmmac: add struct stmmac_pcs_info
Date: Wed, 04 Mar 2026 08:49:15 +0000 [thread overview]
Message-ID: <E1vxhut-0000000BqGc-138V@rmk-PC.armlinux.org.uk> (raw)
In-Reply-To: <aafxqCvJ_XY4YbWw@shell.armlinux.org.uk>
We need to describe one more register (offset and field bitmask) to
the PCS code. Move the existing PCS offset and interrupt enable bits
to a new struct and pass that in to stmmac_integrated_pcs_init().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 9 ++++++---
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 8 ++++++--
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c | 8 ++++----
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h | 9 +++++++--
4 files changed, 23 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index af566636fad9..a3ef237de1b8 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -22,14 +22,17 @@
#include "stmmac_ptp.h"
#include "dwmac1000.h"
+static const struct stmmac_pcs_info dwmac1000_pcs_info = {
+ .pcs_offset = GMAC_PCS_BASE,
+ .int_mask = GMAC_INT_DISABLE_PCSLINK | GMAC_INT_DISABLE_PCSAN,
+};
+
static int dwmac1000_pcs_init(struct stmmac_priv *priv)
{
if (!priv->dma_cap.pcs)
return 0;
- return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,
- GMAC_INT_DISABLE_PCSLINK |
- GMAC_INT_DISABLE_PCSAN);
+ return stmmac_integrated_pcs_init(priv, &dwmac1000_pcs_info);
}
static void dwmac1000_core_init(struct mac_device_info *hw,
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 623868afe93d..7f4949229288 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -22,13 +22,17 @@
#include "dwmac4.h"
#include "dwmac5.h"
+static const struct stmmac_pcs_info dwmac4_pcs_info = {
+ .pcs_offset = GMAC_PCS_BASE,
+ .int_mask = GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE,
+};
+
static int dwmac4_pcs_init(struct stmmac_priv *priv)
{
if (!priv->dma_cap.pcs)
return 0;
- return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,
- GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE);
+ return stmmac_integrated_pcs_init(priv, &dwmac4_pcs_info);
}
static void dwmac4_core_init(struct mac_device_info *hw,
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
index e606dfb85f94..77a83e415597 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
@@ -167,8 +167,8 @@ int stmmac_integrated_pcs_get_phy_intf_sel(struct phylink_pcs *pcs,
return -EINVAL;
}
-int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
- u32 int_mask)
+int stmmac_integrated_pcs_init(struct stmmac_priv *priv,
+ const struct stmmac_pcs_info *pcs_info)
{
struct stmmac_pcs *spcs;
@@ -177,8 +177,8 @@ int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
return -ENOMEM;
spcs->priv = priv;
- spcs->base = priv->ioaddr + offset;
- spcs->int_mask = int_mask;
+ spcs->base = priv->ioaddr + pcs_info->pcs_offset;
+ spcs->int_mask = pcs_info->int_mask;
spcs->pcs.ops = &dwmac_integrated_pcs_ops;
/* If the PCS supports extended status, then it supports BASE-X AN
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index 12ea87792fcb..f3dada71e381 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -27,6 +27,11 @@
struct stmmac_priv;
+struct stmmac_pcs_info {
+ unsigned int pcs_offset;
+ u32 int_mask;
+};
+
struct stmmac_pcs {
struct stmmac_priv *priv;
void __iomem *base;
@@ -45,8 +50,8 @@ void stmmac_integrated_pcs_irq(struct stmmac_priv *priv, u32 status,
struct stmmac_extra_stats *x);
int stmmac_integrated_pcs_get_phy_intf_sel(struct phylink_pcs *pcs,
phy_interface_t interface);
-int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
- u32 int_mask);
+int stmmac_integrated_pcs_init(struct stmmac_priv *priv,
+ const struct stmmac_pcs_info *pcs_info);
/**
* dwmac_ctrl_ane - To program the AN Control Register.
--
2.47.3
next prev parent reply other threads:[~2026-03-04 8:49 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-04 8:47 [PATCH RFC net-next v2 0/7] net: stmmac: improve PCS support Russell King (Oracle)
2026-03-04 8:48 ` [PATCH RFC net-next v2 1/7] net: stmmac: add BASE-X support to integrated PCS Russell King (Oracle)
2026-03-04 10:25 ` Maxime Chevallier
2026-03-04 8:49 ` [PATCH RFC net-next v2 2/7] net: stmmac: qcom-ethqos: enable 2500BASE-X Russell King (Oracle)
2026-03-04 8:49 ` [PATCH RFC net-next v2 3/7] net: stmmac: use integrated PCS for BASE-X modes Russell King (Oracle)
2026-03-04 16:23 ` Maxime Chevallier
2026-03-04 8:49 ` Russell King (Oracle) [this message]
2026-03-04 8:49 ` [PATCH RFC net-next v2 5/7] net: stmmac: add support for reading inband SGMII status Russell King (Oracle)
2026-03-04 8:49 ` [PATCH RFC net-next v2 6/7] net: stmmac: configure SGMII AN control according to phylink Russell King (Oracle)
2026-03-04 8:49 ` [PATCH RFC net-next v2 7/7] net: stmmac: report PCS configuration changes Russell King (Oracle)
2026-03-05 19:46 ` [PATCH RFC net-next v2 0/7] net: stmmac: improve PCS support Mohd Ayaan Anwar
2026-03-06 21:47 ` Russell King (Oracle)
2026-03-09 12:26 ` Mohd Ayaan Anwar
2026-03-09 12:31 ` Russell King (Oracle)
2026-03-09 10:14 ` Russell King (Oracle)
2026-03-09 11:02 ` Russell King (Oracle)
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