From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen-Yu Tsai <wens@kernel.org>,
Samuel Holland <samuel@sholland.org>,
Andre Przywara <andre.przywara@arm.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, Per Larsson <per@palvencia.se>
Subject: Re: [PATCH v2 1/2] arm64: dts: allwinner: a523: add EPHY 25MHz clock fanout pins
Date: Sun, 27 Sep 2026 13:44:38 +0200 [thread overview]
Message-ID: <IuUnKM8SQNWFRyzY1ves-g@gmail.com> (raw)
In-Reply-To: <20260926232142.5244-2-andre.przywara@arm.com>
Dne nedelja, 27. september 2026 ob 01:21:41 Srednjeevropski poletni čas je Andre Przywara napisal(a):
> The Allwinner A523 SoC family provides two clock fanout pins, which are
> backed by gated clocks fixed to 25 MHz, divided down from the main
> peripheral PLL. Those are meant to clock an Ethernet PHY, and allow to
> save an external crystal oscillator typically employed for that purpose.
>
> Add the pin descriptions of the two pins for those clocks, one is within
> the RGMII0 pins, the other within the RGMII1 pins, although the clock
> fanout works completely independently from the two MACs.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
next prev parent reply other threads:[~2026-09-27 11:44 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-26 23:21 [PATCH v2 0/2] arm64: dts: allwinner: x96qpro+: enable Ethernet support Andre Przywara
2026-09-26 23:21 ` [PATCH v2 1/2] arm64: dts: allwinner: a523: add EPHY 25MHz clock fanout pins Andre Przywara
2026-09-27 11:44 ` Jernej Škrabec [this message]
2026-09-26 23:21 ` [PATCH v2 2/2] arm64: dts: allwinner: a523: x96qpro+: enable Ethernet support Andre Przywara
2026-09-26 23:42 ` sashiko-bot
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