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[91.141.74.240]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48de0ab4edfsm15124324f8f.26.2026.10.14.14.11.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 14:11:43 -0700 (PDT) From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= To: linux-arm-kernel@lists.infradead.org, Navid Ghahremani Cc: arnd@arndb.de, krzk@kernel.org, Navid Ghahremani , Linus Walleij , Bartosz Golaszewski , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: Re: [PATCH v2 08/24] gpio: Add ZTE ZX279128S GPIO driver Date: Wed, 14 Oct 2026 23:11:40 +0200 Message-ID: In-Reply-To: <20261014072109.1759502-9-ghahramani.navid@gmail.com> References: <20261014072109.1759502-1-ghahramani.navid@gmail.com> <20261014072109.1759502-9-ghahramani.navid@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextParttNiNcatGTRe0X_MNundQow"; micalg="pgp-sha256"; protocol="application/pgp-signature" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261014_141146_832243_CC7A505B X-CRM114-Status: GOOD ( 11.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --nextParttNiNcatGTRe0X_MNundQow Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8"; protected-headers="v1" From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= Subject: Re: [PATCH v2 08/24] gpio: Add ZTE ZX279128S GPIO driver Date: Wed, 14 Oct 2026 23:11:40 +0200 Message-ID: In-Reply-To: <20261014072109.1759502-9-ghahramani.navid@gmail.com> MIME-Version: 1.0 Am Mittwoch, 14. Oktober 2026, 09:20:48 Mitteleurop=C3=A4ische Sommerzeit s= chrieb=20 Navid Ghahremani: > + * Each bank has 16 lines, one bit per line in each register. The regist= ers > + * at 0x04-0x10 and 0x28-0x34 control the interrupts, which are not > supported + * yet. > + */ > +#define ZX279128S_GPIO_DIR 0x00 /* 1: output */ > +#define ZX279128S_GPIO_DATA 0x14 /* line level */ > +#define ZX279128S_GPIO_SET 0x18 /* write 1: drive high */ > +#define ZX279128S_GPIO_CLEAR 0x1c /* write 1: drive low */ =46yi, there is also Documentation/devicetree/bindings/gpio/gpio-mmio.yaml,= =20 which allows you to put this directly into the DTS without a driver shim. --nextParttNiNcatGTRe0X_MNundQow Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. 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