diff for duplicates of <Y/+AN0e5netDShxx@spud>

diff --git a/N1/1.1.hdr b/N1/1.1.hdr
new file mode 100644
index 0000000..5a32186
--- /dev/null
+++ b/N1/1.1.hdr
@@ -0,0 +1,3 @@
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diff --git a/a/1.txt b/N1/1.1.txt
similarity index 79%
rename from a/1.txt
rename to N1/1.1.txt
index 875315f..a6b8dac 100644
--- a/a/1.txt
+++ b/N1/1.1.txt
@@ -6,14 +6,14 @@ On Fri, Feb 24, 2023 at 05:01:08PM +0000, Andy Chiu wrote:
 > This patch adds task switch support for vector. It also supports all
 > lengths of vlen.
 > 
-> [guoren at linux.alibaba.com: First available porting to support vector
+> [guoren@linux.alibaba.com: First available porting to support vector
 > context switching]
-> [nick.knight at sifive.com: Rewrite vector.S to support dynamic vlen, xlen and
+> [nick.knight@sifive.com: Rewrite vector.S to support dynamic vlen, xlen and
 > code refine]
-> [vincent.chen at sifive.com: Fix the might_sleep issue in riscv_v_vstate_save,
+> [vincent.chen@sifive.com: Fix the might_sleep issue in riscv_v_vstate_save,
 > riscv_v_vstate_restore]
-> [andrew at sifive.com: Optimize task switch codes of vector]
-> [ruinland.tsai at sifive.com: Fix the arch_release_task_struct free wrong
+> [andrew@sifive.com: Optimize task switch codes of vector]
+> [ruinland.tsai@sifive.com: Fix the arch_release_task_struct free wrong
 > datap issue]
 > [vineetg: Fixed lkp warning with W=1 build]
 > [andy.chiu: Use inline asm for task switches]
@@ -61,10 +61,3 @@ Other than my complaint about the changelogs, this looks grand.
 
 Thanks,
 Conor.
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diff --git a/N1/2.hdr b/N1/2.hdr
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diff --git a/N1/2.txt b/N1/2.txt
new file mode 100644
index 0000000..e409076
--- /dev/null
+++ b/N1/2.txt
@@ -0,0 +1,4 @@
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index adfa9f7..df01345 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,10 +1,31 @@
  "ref\020230224170118.16766-1-andy.chiu@sifive.com\0"
  "ref\020230224170118.16766-10-andy.chiu@sifive.com\0"
  "From\0Conor Dooley <conor@kernel.org>\0"
- "Subject\0[PATCH -next v14 09/19] riscv: Add task switch support for vector\0"
+ "Subject\0Re: [PATCH -next v14 09/19] riscv: Add task switch support for vector\0"
  "Date\0Wed, 1 Mar 2023 16:41:27 +0000\0"
- "To\0kvm-riscv@lists.infradead.org\0"
- "\00:1\0"
+ "To\0Andy Chiu <andy.chiu@sifive.com>\0"
+ "Cc\0Kefeng Wang <wangkefeng.wang@huawei.com>"
+  guoren@linux.alibaba.com
+  Heiko Stuebner <heiko@sntech.de>
+  kvm@vger.kernel.org
+  atishp@atishpatra.org
+  Conor Dooley <conor.dooley@microchip.com>
+  Guo Ren <guoren@kernel.org>
+  Jisheng Zhang <jszhang@kernel.org>
+  linux-riscv@lists.infradead.org
+  Nick Knight <nick.knight@sifive.com>
+  anup@brainfault.org
+  Ruinland Tsai <ruinland.tsai@sifive.com>
+  greentime.hu@sifive.com
+  Albert Ou <aou@eecs.berkeley.edu>
+  vineetg@rivosinc.com
+  Paul Walmsley <paul.walmsley@sifive.com>
+  Dmitry Vyukov <dvyukov@google.com>
+  Vincent Chen <vincent.chen@sifive.com>
+  palmer@dabbelt.com
+  Eric W. Biederman <ebiederm@xmission.com>
+ " kvm-riscv@lists.infradead.org\0"
+ "\02:1.1\0"
  "b\0"
  "Hey Andy,\n"
  "\n"
@@ -14,14 +35,14 @@
  "> This patch adds task switch support for vector. It also supports all\n"
  "> lengths of vlen.\n"
  "> \n"
- "> [guoren at linux.alibaba.com: First available porting to support vector\n"
+ "> [guoren@linux.alibaba.com: First available porting to support vector\n"
  "> context switching]\n"
- "> [nick.knight at sifive.com: Rewrite vector.S to support dynamic vlen, xlen and\n"
+ "> [nick.knight@sifive.com: Rewrite vector.S to support dynamic vlen, xlen and\n"
  "> code refine]\n"
- "> [vincent.chen at sifive.com: Fix the might_sleep issue in riscv_v_vstate_save,\n"
+ "> [vincent.chen@sifive.com: Fix the might_sleep issue in riscv_v_vstate_save,\n"
  "> riscv_v_vstate_restore]\n"
- "> [andrew at sifive.com: Optimize task switch codes of vector]\n"
- "> [ruinland.tsai at sifive.com: Fix the arch_release_task_struct free wrong\n"
+ "> [andrew@sifive.com: Optimize task switch codes of vector]\n"
+ "> [ruinland.tsai@sifive.com: Fix the arch_release_task_struct free wrong\n"
  "> datap issue]\n"
  "> [vineetg: Fixed lkp warning with W=1 build]\n"
  "> [andy.chiu: Use inline asm for task switches]\n"
@@ -68,13 +89,22 @@
  "Other than my complaint about the changelogs, this looks grand.\n"
  "\n"
  "Thanks,\n"
- "Conor.\n"
- "-------------- next part --------------\n"
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+ Conor.
+ "\02:1.2\0"
+ "fn\0signature.asc\0"
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+ "b\0"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
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