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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Badal Nilawar <badal.nilawar@intel.com>
Cc: intel-gfx@lists.freedesktop.org, matthew.d.roper@intel.com,
	dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Apply Wa_14017073508 for MTL SoC Step
Date: Thu, 23 Feb 2023 15:20:28 -0500	[thread overview]
Message-ID: <Y/fKjHl/xb1CBD/b@intel.com> (raw)
In-Reply-To: <20230223184140.3452853-1-badal.nilawar@intel.com>

On Fri, Feb 24, 2023 at 12:11:40AM +0530, Badal Nilawar wrote:
> Apply Wa_14017073508 for MTL SoC die A step instead of graphics step.
> To get the SoC die stepping there is no direct interface so using
> revid as revid 0 aligns with SoC die A step.
> 
> Bspec: 55420

This doesn't prove anything. It is just saying Die A0 with GT A0,
die B0 with GT B0 and so on... Please help me to understand that
better offline before we move forward...

> 
> Fixes: 8f70f1ec587d ("drm/i915/mtl: Add Wa_14017073508 for SAMedia")
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_pm.c     | 4 ++--
>  drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> index cef3d6f5c34e..4ba3c8c97ccc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> @@ -29,7 +29,7 @@
>  static void mtl_media_busy(struct intel_gt *gt)
>  {
>  	/* Wa_14017073508: mtl */
> -	if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
> +	if (IS_METEORLAKE(gt->i915) && INTEL_REVID(gt->i915) == 0 &&
>  	    gt->type == GT_MEDIA)
>  		snb_pcode_write_p(gt->uncore, PCODE_MBOX_GT_STATE,
>  				  PCODE_MBOX_GT_STATE_MEDIA_BUSY,
> @@ -39,7 +39,7 @@ static void mtl_media_busy(struct intel_gt *gt)
>  static void mtl_media_idle(struct intel_gt *gt)
>  {
>  	/* Wa_14017073508: mtl */
> -	if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
> +	if (IS_METEORLAKE(gt->i915) && INTEL_REVID(gt->i915) == 0 &&
>  	    gt->type == GT_MEDIA)
>  		snb_pcode_write_p(gt->uncore, PCODE_MBOX_GT_STATE,
>  				  PCODE_MBOX_GT_STATE_MEDIA_NOT_BUSY,
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> index fcf51614f9a4..7429c233ad45 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> @@ -19,7 +19,7 @@ static bool __guc_rc_supported(struct intel_guc *guc)
>  	 * Do not enable gucrc to avoid additional interrupts which
>  	 * may disrupt pcode wa.
>  	 */
> -	if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
> +	if (IS_METEORLAKE(gt->i915) && INTEL_REVID(gt->i915) == 0 &&
>  	    gt->type == GT_MEDIA)
>  		return false;
>  
> -- 
> 2.25.1
> 

  reply	other threads:[~2023-02-23 20:20 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-23 18:41 [Intel-gfx] [PATCH] drm/i915/mtl: Apply Wa_14017073508 for MTL SoC Step Badal Nilawar
2023-02-23 18:41 ` Badal Nilawar
2023-02-23 20:20 ` Rodrigo Vivi [this message]
2023-02-23 21:13   ` [Intel-gfx] " Matt Roper
2023-02-23 21:13     ` Matt Roper
2023-02-28 13:12     ` Nilawar, Badal
2023-02-23 20:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2023-02-24  3:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-02-24  7:54 ` [Intel-gfx] [PATCH] " Gupta, Anshuman
2023-02-24  7:54   ` Gupta, Anshuman
2023-02-24  9:27 ` [Intel-gfx] " Tvrtko Ursulin
2023-02-24 13:03 ` Jani Nikula

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